PTN3366 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 1.1 — 22 May 2015 6 of 26
NXP Semiconductors
PTN3366
Low power HDMI/DVI level shifter supporting 3 Gbit/s operation
6. Pinning information
6.1 Pinning
6.2 Pin description
HVQFN32 package supply ground is connected to the exposed center pad. The exposed center
pad must be connected to supply ground for proper device operation. For enhanced thermal,
electrical, and board level performance, the exposed pad must be soldered to the board using a
corresponding thermal pad on the board and for proper heat conduction through the board, thermal
vias must be incorporated in the PCB in the thermal pad region.
Fig 3. Pin configuration for HVQFN32
002aah585
PTN3366BS
Transparent top view
OE_N
SCL_SOURCE
EQ0
V
DD
SDA_SOURCE SCL_SINK
HPD_SOURCE SDA_SINK
REXT HPD_SINK
n.c. DDC_EN
EQ1 n.c.
V
DD
n.c.
OUT_D4+
OUT_D4−
OUT_D3+
OUT_D3−
OUT_D2+
OUT_D2−
OUT_D1+
OUT_D1−
IN_D4+
IN_D4−
IN_D3+
IN_D3−
IN_D2+
IN_D2−
IN_D1+
IN_D1−
8 17
7 18
6 19
5 20
4 21
3 22
2 23
1 24
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
terminal 1
index area
GND
Table 3. Pin description
Symbol Pin Type Description
OE_N, IN_Dx and OUT_Dx signals
OE_N 17 3.3 V low-voltage
CMOS single-ended
input
Output Enable and power saving function for high-speed differential
level shifter path.
When OE_N = HIGH:
IN_Dx termination = high-Z
OUT_Dx outputs = high-Z; zero output current
When OE_N = LOW:
IN_Dx termination = 50
OUT_Dx outputs = active
IN_D4+ 32 Self-biasing
differential input
Low-swing differential input from display source. IN_D4+ makes a
differential pair with IN_D4. The input to this pin must be AC coupled
externally.
IN_D4 31 Self-biasing
differential input
Low-swing differential input from display source. IN_D4 makes a
differential pair with IN_D4+. The input to this pin must be AC coupled
externally.
