LTC6994-1/LTC6994-2
4
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Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC6994C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 3: The LTC6994C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6994C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but it is not tested or
QA sampled at these temperatures. The LTC6994I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6994H is guaranteed
to meet specified performance from –40°C to 125°C. The LTC6994MP is
guaranteed to meet specified performance from –55°C to 125°C.
Note 4: Delay accuracy is defined as the deviation from the t
DELAY
equation, assuming R
SET
is used to program the delay.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Digital I/O
IN Pin Input Capacitance 2.5 pF
IN Pin Input Current IN = 0V to V
+
±10 nA
V
IH
High Level IN Pin Input Voltage (Note 6)
l
0.7 • V
+
V
V
IL
Low Level IN Pin Input Voltage (Note 6)
l
0.3 • V
+
V
I
OUT(MAX)
Output Current V
+
= 2.7V to 5.5V ±20 mA
V
OH
High Level Output Voltage (Note 7) V
+
= 5.5V I
OUT
= –1mA
I
OUT
= –16mA
l
l
5.45
4.84
5.48
5.15
V
V
V
+
= 3.3V I
OUT
= –1mA
I
OUT
= –10mA
l
l
3.24
2.75
3.27
2.99
V
V
V
+
= 2.25V I
OUT
= –1mA
I
OUT
= –8mA
l
l
2.17
1.58
2.21
1.88
V
V
V
OL
Low Level Output Voltage (Note 7) V
+
= 5.5V I
OUT
= 1mA
I
OUT
= 16mA
l
l
0.02
0.26
0.04
0.54
V
V
V
+
= 3.3V I
OUT
= 1mA
I
OUT
= 10mA
l
l
0.03
0.22
0.05
0.46
V
V
V
+
= 2.25V I
OUT
= 1mA
I
OUT
= 8mA
l
l
0.03
0.26
0.07
0.54
V
V
t
PD
Propagation Delay V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
10
14
24
ns
ns
ns
t
WIDTH
Minimum Recognized Input Pulse Width V
+
= 3.3V 5 ns
t
r
Output Rise Time (Note 8) V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
1.1
1.7
2.7
ns
ns
ns
t
f
Output Fall Time (Note 8) V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
1.0
1.6
2.4
ns
ns
ns
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Test conditions are V
+
= 2.25V to 5.5V, IN = 0V, DIVCODE = 0 to 15
(N
DIV
= 1 to 2
21
), R
SET
= 50k to 800k, R
LOAD
= ∞, C
LOAD
= 5pF unless otherwise noted.
Note 5: See Operation section, Table 1 and Figure 2 for a full explanation
of how the DIV pin voltage selects the value of DIVCODE.
Note 6: The IN pin has hysteresis to accommodate slow rising or falling
signals. The threshold voltages are proportional to V
+
. Typical values can
be estimated at any supply voltage using:
V
IN(RISING)
≈ 0.55 • V
+
+ 185mV and V
IN(FALLING)
≈ 0.48 • V
+
– 155mV
Note 7: To conform to the Logic IC Standard, current out of a pin is
arbitrarily given a negative value.
Note 8: Output rise and fall times are measured between the 10% and the
90% power supply levels with 5pF output load. These specifications are
based on characterization.
Note 9: Settling time is the amount of time required for the output to settle
within ±1% of the final delay after a 0.5× or 2× change in I
SET
.
Note 10: Jitter is the ratio of the deviation of the programmed delay to the
mean of the delay. This specification is based on characterization and is
not 100% tested.
