AD9201
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1999
REV. D
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Dual Channel, 20 MHz 10-Bit
Resolution CMOS ADC
FEATURES
Complete Dual Matching ADCs
Low Power Dissipation: 215 mW (+3 V Supply)
Single Supply: 2.7 V to 5.5 V
Differential Nonlinearity Error: 0.4 LSB
On-Chip Analog Input Buffers
On-Chip Reference
Signal-to-Noise Ratio: 57.8 dB
Over Nine Effective Bits
Spurious-Free Dynamic Range: –73 dB
No Missing Codes Guaranteed
28-Lead SSOP
FUNCTIONAL BLOCK DIAGRAM
1V
REFERENCE
BUFFER
QREFB
IREFB
QREFT
IREFT
VREF
REFSENSE
IINA
IINB
"I" ADC
QINB
QINA
"Q" ADC
Q
REGISTER
I
REGISTER
THREE-
STATE
OUTPUT
BUFFER
AVDD AVSS
CLOCK
DVDD DVSS
SLEEP
SELECT
DATA
10 BITS
CHIP
SELECT
AD9201
ASYNCHRONOUS
MULTIPLEXER
PRODUCT DESCRIPTION
The AD9201 is a complete dual channel, 20 MSPS, 10-bit
CMOS ADC. The AD9201 is optimized specifically for applica-
tions where close matching between two ADCs is required (e.g.,
I/Q channels in communications applications). The 20 MHz
sampling rate and wide input bandwidth will cover both narrow-
band and spread-spectrum channels. The AD9201 integrates two
10-bit, 20 MSPS ADCs, two input buffer amplifiers, an internal
voltage reference and multiplexed digital output buffers.
Each ADC incorporates a simultaneous sampling sample-and-
hold amplifier at its input. The analog inputs are buffered; no
external input buffer op amp will be required in most applica-
tions. The ADCs are implemented using a multistage pipeline
architecture that offers accurate performance and guarantees no
missing codes. The outputs of the ADCs are ported to a multi-
plexed digital output buffer.
The AD9201 is manufactured on an advanced low cost CMOS
process, operates from a single supply from 2.7 V to 5.5 V, and
consumes 215 mW of power (on 3 V supply). The AD9201 input
structure accepts either single-ended or differential signals,
providing excellent dynamic performance up to and beyond
its 10 MHz Nyquist input frequencies.
PRODUCT HIGHLIGHTS
1. Dual 10-Bit, 20 MSPS ADCs
A pair of high performance 20 MSPS ADCs that are opti-
mized for spurious free dynamic performance are provided for
encoding of I and Q or diversity channel information.
2. Low Power
Complete CMOS Dual ADC function consumes a low
215 mW on a single supply (on 3 V supply). The AD9201
operates on supply voltages from 2.7 V to 5.5 V.
3. On-Chip Voltage Reference
The AD9201 includes an on-chip compensated bandgap
voltage reference pin programmable for 1 V or 2 V.
4. On-chip analog input buffers eliminate the need for external
op amps in most applications.
5. Single 10-Bit Digital Output Bus
The AD9201 ADC outputs are interleaved onto a single
output bus saving board space and digital pin count.
6. Small Package
The AD9201 offers the complete integrated function in a
compact 28-lead SSOP package.
7. Product Family
The AD9201 dual ADC is pin compatible with a dual 8-bit
ADC (AD9281) and has a companion dual DAC product,
the AD9761 dual DAC.
AD9201* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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DOCUMENTATION
Application Notes
AN-282: Fundamentals of Sampled Data Systems
AN-345: Grounding for Low-and-High-Frequency Circuits
AN-501: Aperture Uncertainty and ADC System
Performance
AN-715: A First Approach to IBIS Models: What They Are
and How They Are Generated
AN-737: How ADIsimADC Models an ADC
AN-741: Little Known Characteristics of Phase Noise
AN-756: Sampled Systems and the Effects of Clock Phase
Noise and Jitter
AN-835: Understanding High Speed ADC Testing and
Evaluation
AN-905: Visual Analog Converter Evaluation Tool Version
1.0 User Manual
AN-935: Designing an ADC Transformer-Coupled Front
End
Data Sheet
AD9201: Dual Channel, 20 MHz 10-Bit Resolution CMOS
ADC Data Sheet
TOOLS AND SIMULATIONS
Visual Analog
REFERENCE MATERIALS
Technical Articles
Correlating High-Speed ADC Performance to Multicarrier
3G Requirements
DNL and Some of its Effects on Converter Performance
MS-2210: Designing Power Supplies for High Speed ADC
DESIGN RESOURCES
AD9201 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all AD9201 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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–2–
REV. D
AD9201–SPECIFICATIONS
(AVDD = +3 V, DVDD = +3 V, F
SAMPLE
= 20 MSPS, VREF = 2 V, INB = 0.5 V, T
MIN
to T
MAX,
internal ref, differential input signal, unless otherwise noted)
Parameter Symbol Min Typ Max Units Condition
RESOLUTION 10 Bits
CONVERSION RATE F
S
20 MHz
DC ACCURACY
Differential Nonlinearity DNL ±0.4 LSB REFT = 1 V, REFB = 0 V
Integral Nonlinearity INL 1.2 LSB
Differential Nonlinearity (SE) DNL ±0.5 ±1 LSB REFT = 1 V, REFB = 0 V
Integral Nonlinearity (SE) INL ±1.5 ±2.5 LSB
Zero-Scale Error, Offset Error E
ZS
±1.5 ±3.8 % FS
Full-Scale Error, Gain Error E
FS
±3.5 ±5.4 % FS
Gain Match ±0.5 LSB
Offset Match ±5 LSB
ANALOG INPUT
Input Voltage Range AIN –0.5 AVDD/2 V
Input Capacitance C
IN
2pF
Aperture Delay t
AP
4ns
Aperture Uncertainty (Jitter) t
AJ
2ps
Aperture Delay Match 2 ps
Input Bandwidth (–3 dB) BW
Small Signal (–20 dB) 240 MHz
Full Power (0 dB) 245 MHz
INTERNAL REFERENCE
Output Voltage (1 V Mode) VREF 1 V REFSENSE = VREF
Output Voltage Tolerance (1 V Mode) ±10 mV
Output Voltage (2 V Mode) VREF 2 V REFSENSE = GND
Output Voltage Tolerance (2 V Mode) ±15 mV
Load Regulation (1 V Mode) ±28 mV 1 mA Load Current
Load Regulation (2 V Mode) ±15 mV 1 mA Load Current
POWER SUPPLY
Operating Voltage AVDD 2.7 3 5.5 V AVDD – DVDD 2.3 V
DRVDD 2.7 3 5.5 V
Supply Current I
AVDD
71.6 mA AVDD = 3 V
I
DRVDD
0.1 mA
Power Consumption P
D
215 245 mW AVDD = DVDD = 3 V
Power-Down 15.5 mW STBY = AVDD, Clock = AVSS
Power Supply Rejection PSR 0.8 1.3 % FS
DYNAMIC PERFORMANCE
1
Signal-to-Noise and Distortion SINAD
f = 3.58 MHz 55.6 57.3 dB
f = 10 MHz 55.8 dB
Signal-to-Noise SNR
f = 3.58 MHz 55.9 57.8 dB
f = 10 MHz 56.2 dB
Total Harmonic Distortion THD
f = 3.58 MHz –69 –63.3 dB
f = 10 MHz –66.3 dB
Spurious Free Dynamic Range SFDR
f = 3.58 MHz –66 –73 dB
f = 10 MHz –70.5 dB
Two-Tone Intermodulation Distortion
2
IMD –62 dB f = 44.49 MHz and 45.52 MHz
Differential Phase DP 0.1 Degree NTSC 40 IRE Mod Ramp
Differential Gain DG 0.05 % F
S
= 14.3 MHz
Crosstalk Rejection 68 dB

AD9201ARSZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC Dual CH 20MHz 10B Resolution CMOS
Lifecycle:
New from this manufacturer.
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