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NCP4326DR2
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
NCP4326
http://onsemi.com
13
0.60
0.70
0.80
0.90
1.00
Figure 16. Enable Soft−Start Mode or Disable
Driver Mode vs. T
emperature
TEMPERA
TURE (
°
C)
V
ENx−TH1
(V)
Figure 17. Max V
oltage on ENx Pin Ending
Soft−Start and Enable the Regulation Mode
vs. T
emperature
Figure 18. V
oltage on ENx Pin with an
External Current Sink @ 500
m
A vs.
T
emperature
Figure 19. Soft−Start Current Source on
Enable Pin vs. V
EN
Figure 20. Soft−Start Current Source on Enable
Pin vs. V
CC
V
CC
(V)
I
ENx
(
A)
130
140
150
160
170
180
Figure 21. T
urn ON and OFF Propagation Delay
in Soft−Start Mode vs. T
emperature
400
600
TEMPERA
TURE (
°
C)
T
SS
(ns)
450
500
550
EN1
0
20
40
60
100
120
80
0
20
40
60
100
12
0
80
57
9
1
1 1
5
13
4.5
4.6
4.7
4.8
4.9
TEMPERA
TURE (
°
C)
V
ENx−max2
(V)
0
20
40
60
100
120
80
400
−1000
−800
−600
−400
−200
0
V
ENx
(V)
I
ENx
(
A)
T
SS_OFF
012
3
5
6
4
EN2
EN1
EN2
0.65
0.75
0.85
0.95
4.0
4.2
4.4
4.6
4.8
TEMPERA
TURE (
°
C)
V
ENx−TH2
(V)
EN1
0
20
40
60
100
12
0
80
EN2
4.1
4.3
4.5
4.7
5.0
5.1
5.2
5.3
5.4
5.5
200
T
SS_ON
I
EN1
I
EN2
190
I
EN1
I
EN2
NCP4326
http://onsemi.com
14
1.20
1.25
1.30
1.35
1.40
Figure 22. High Level Flux Pin Clamp V
oltage
vs. T
emperature
TEMPERA
TURE (
°
C)
V
flux_H
(V)
Figure 23. Low Level Flux Pin Clamp V
oltage
vs. T
emperature
Figure 24. Flux Pin Internal Current Source
vs. Flux V
oltage
Figure 25. Synchronization Input V
oltage
Threshold vs. T
emperature
Figure 26. Error Amplifier Internal V
oltage
Reference vs. T
emperature
TEMPERA
TURE (
°
C)
V
ref (V)
1.240
1.245
1.250
1.255
1.260
1.265
1.270
Figure 27. Error Amplifier Input Bias Current
vs. T
emperature
−60
−50
−30
TEMPERA
TURE (
°
C)
INPUT CURRENT BIAS (nA)
−10
−40
−20
0
V
fb_shunt
0
20
40
60
100
120
80
0
20
40
60
100
12
0
80
0
20
40
60
100
120
80
−0.09
−0.08
−0.07
−0.06
−0.05
−0.04
−0.03
TEMPERA
TURE (
°
C)
V
flux_L
(V)
0
20
40
60
100
12
0
80
−1600
−1200
−800
−400
0
TEMPERA
TURE (
°
C)
I
flux
(
A)
−150
−100
−50
0
100
150
50
80
50
55
60
65
70
75
TEMPERA
TURE (
°
C)
V
sync_th
(mV)
0
20
40
60
100
12
0
80
V
fb1
1.45
1.50
−0.02
−0.01
0.00
100
85
90
95
−1400
−1000
−600
−200
V
fb2
I
ib_shunt
I
ib1
I
ib2
NCP4326
http://onsemi.com
15
Figure 28. Error Amplifier Shunt Regulator
Output V
oltage Swing vs. T
emperature
Figure 29. Error Amplifier Shunt Regulator Output
V
oltage Swing vs. Output Current (I
sink
)
I
SINK
(mA)
V
ol (mV)
600
700
800
900
1000
1
100
1200
Figure 30. Minimum V
oltage Clamp on Ct Pin vs.
T
emperature
1.40
1.45
1.55
1.80
TEMPERA
TURE (
°
C)
Vct−min (V)
1.65
1.50
1.60
1.70
0
20
40
60
100
120
80
01
0
2
0
3
0
5
0
6
0
40
TEMPERA
TURE (
°
C)
0
20
40
60
100
120
80
1.75
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
ol−Shunt (V)
3.8
4.0
4.2
4.4
4.6
Figure 31. Maximum V
oltage Clamp on Ct Pin
@ 500
m
A vs. T
emperature
TEMPERA
TURE (
°
C)
Vct−max2 (V)
0
20
40
60
100
1
20
80
3.9
4.1
4.3
4.5
Figure 32. Internal Current Source on Ct Pin
vs. T
emperature
450
500
550
600
650
700
TEMPERA
TURE (
°
C)
I
Ct
(
A)
0
20
40
60
100
120
80
Figure 33. Internal Current Source on Ct Pin
vs. V
Ct
−1000
−800
−600
−400
−200
V
Ct
(V)
I
Ct
(A)
012
3
5
4
0
200
400
600
800
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
NCP4326DR2
Mfr. #:
Buy NCP4326DR2
Manufacturer:
ON Semiconductor
Description:
IC REG SECONDARY CTR 3OUT 16SOIC
Lifecycle:
New from this manufacturer.
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