NCP4326
http://onsemi.com
19
Duty Cycle Control:
Figure 41 shows the duty cycle value according the opamp
output voltage (CPx pin):
1. If the opamp output (V
CPx
) is above the maximum
ramp value (V
Ct_max1
) on “Ct” pin then the duty
cycle will be equal to 100%.
2. If V
CPx
is between the max and the min value of
the ramp voltage, respectively V
Ct_max1
and
V
Ct_min1
then the duty cycle will be included
between 0 and 100%.
3. If V
CPx
is below the min ramp value (V
Ct_min1
)
then the output driver will be place in skip cycle
mode with a null duty cycle.
FB Voltage on pin CPx
Time
Figure 41. Duty Cycle Variation versus the
Feedback Voltage
V
OH1,
2min
Duty Cycle = 100%
0% < Duty Cycle < 100%
Duty Cycle = 0%
V
Ct_max1
V
Ct_min
V
Cpx
Here after find the experimental results illustrating the skip cycle feature:
DRV2 pin Signal
(10 V/div)
Ct ramp pin signal
(1 V/div)
Error amplifier
output voltage (CP2
pin) (1 V/div).
Variable
Duty Cycle
100%
Duty Cycle
0% DC
0% DC
Figure 42. All Duty Cycle Representation
NCP4326
http://onsemi.com
20
Detailed Soft−Start Behavior
A soft−start is proposed to avoid a high peak current
during startup sequences in trailing edge mode control.
Increasing smoothly the secondary duty cycle from zero to
the nominal value in trailing edge mode control does not
limit this current (see Figure 43).
NCP4326 is a voltage mode controller type (i.e. the
secondary peak current is not sensed); the peak current
sensing can not be used to ensure a proper peak current ramp
up on secondary side.
Instead of controlling the peak current ramp up, if the
secondary controller smoothly ramps up the duty cycle then
the result will not yield a smooth ramp up peak current as in
conventional PWM controllers (see Figure 43).
As depicted in Figure 43, when the secondary duty cycle
is increased smoothly the peak current does not ramp up. It
is not possible to have a ramp up peak current because at the
beginning of the OFF time period the flux stored in the
flyback transformer is at the maximum value so the peak
current yields by this flux will be also at a maximum value.
Consequently, the peak current is not linked to the duty cycle
width. The peak current is only linked to the energy stored
in the flyback transformer and the current sharing during the
primary OFF time.
t
0
t
0
0
Verror
VCt
DRV
0
ID2
Vsync
OFF TimeON Time
0
Transformateur Flux
t
t
t
Figure 43. Increasing Smoothly the Duty Cycle Does Not Yield a Smooth Peak Current Ramp up
NCP4326
http://onsemi.com
21
The new patented soft−start is based on the flux
transformer reconstruction concept with leading edge mode
control during a startup sequence only.
A startup sequence can be arisen with the 3 following
cases:
1. The power supply unit is just plug on the main
supply, in this case there is a general startup.
2. The power supply unit is running but one or the
both outputs are disabled, thus by enabling the
output a new startup happened.
3. The power supply unit is running but the
secondary controller is in standby mode (STBY
pin grounded), when the standby mode is left, a
startup sequence happen if at least one of the
outputs is enable.
The idea of this soft−start is to reconstruct the flux image
inside the flyback transformer, and to compare this image
with a slow ramp up voltage on enable pin, to generate a
smooth increasing duty cycle in leading edge mode. The
leading edge mode control guarantees that the peak current
ramps up smoothly. Because the secondary duty cycle
finishes at the OFF−time end and starts just before.
At the end of the off time period and due to the primary
controller running in critical conduction mode; the flux in
the transformer is null, so the peak will start from zero to
reach the nominal value.
Figure 44 illustrates the driver synchronization in
soft−start sequence.
0
t
0
t
0
t
Verror
VCt
DRV
0
t
0
t
ID2
Transfo Flux
Vsync
OFF TimeON Time
EN voltage
Figure 44. Startup Sequence Illustrating the Leading Edge Mode Control
Due to the internal current source and the external
capacitor connected on enable pin (EN1 and EN2 pin); a
voltage ramp is generated that it fixes the soft−start time; by
playing with the capacitor value the soft−start time can be
adjusted to fit the application startup time.

NCP4326DR2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC REG SECONDARY CTR 3OUT 16SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet