NCP4326
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4
PIN FUNCTION DESCRIPTION
Pin No. Symbol Type Description
1 CP1 Error Amplifier
Output 1
This pin is the output of the error amplifier 1 (monitoring the secondary voltage #1) and is
available for loop compensation purpose.
2 FB1 Voltage
Feedback 1
This is the inverting input of the error amplifier 1. It is connected to the secondary voltage
#1 via a bridge resistor divider.
3 EN2 Soft−Start and
Enable or Disable
the Driver 2
This pin enables or disables the driver 2. An internal current source with an external
capacitor generates also a soft−start feature for limiting the startup peak current on the
controlled output.
This pin can be left open and by default it enables the driver 2, but without soft−start
feature.
4 CP2 Error Amplifier
Output 2
This pin is the output of the error amplifier 2 (monitoring the secondary voltage #2) and is
available for loop compensation purpose.
5 FB2 Voltage
Feedback 2
This is the inverting input of the error amplifier. It is connected to the secondary voltage #2
via a bridge resistor divider.
6 Ct Ct Pin Connect the timing capacitor between Ct and the ground.
7 Sync Synchronization
Pin
This pin monitors the main secondary winding, detects the beginning and the end of the
demagnetization phase (T
OFF
time on the primary winding) and allows the regulation on
the two secondary outputs.
8 CPm Shunt Regulator
Output
This pin is the output of the shunt regulator (monitoring the main secondary voltage). An
open collector configuration is implemented.
9 FBm Main Voltage
Feedback
This is the inverting input of the internal error amplifier. It is connected to the main output
voltage via a bridge resistor divider.
10 STBY Standby This pin is internally pulled up and allows standby mode feature. This pin can be left open
and by default it enables standard working mode. When this pin is pulled down standby
mode is activated and the quiescent current is reduced to the minimum. The output drivers
are disabled.
11 DRV2 Output Driver 2 This output directly drives the gate of a power MOSFET.
12 Vcc Supplies the IC This pin is connected to the main secondary output voltage and internally powers the IC.
13 DRV1 Output Driver 1 This output directly drives the gate of a power MOSFET.
14 Flux Voltage image of
the magnetic flux
A RC network connected between this pin and a forward winding or a negative output
winding generates the transformers flux image. This flux image is compared to a slow
ramp generated on ENx pin for the soft−start Duty Cycle generation controlling the both
outputs.
15 GND The IC ground
16 EN1 Soft−Start and
Enable or Disable
the driver 1
This pin enables or disables the driver 1. An internal current source with an external
capacitor generates also a soft−start feature for limiting the startup peak current on the
controlled output.
This pin can be left open and by default it enables the driver 1, but without soft−start
feature.
NCP4326
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5
V
CC
Figure 3. Internal Circuit Architecture
+
GND
1V25
Sync
CP1
FB1
CP2
FB2
DRV1
DRV
1V25
FBm
CPm
VOLTAGE
REFERENCE
1
2
3
4
5
7
8
16
14
STBY
12
10
Ct6
UVLO
Vcc OK
Vcc OK
+
1V25
GND
Ctramp
4V0
1V6
GND
STBY
GND
GND
GND
Flux
9
EN2
11
GND
13
EN1
2V5
+
2V5
0V
1V
+
8.5R
R
GND
Clamp
Int_Flux
GND
4V5
Offset
0V5
I
Ct
V
DD1
*
V
DD1
V
DD
**
V
DD1
V
DD1
V
DD
V
DD
V
DD
V
CC
V
CC
V
CC
*V
DD1
is not available in standby mode
**V
DD
is available all the time
OPAMP with
Open Collector Output
CHANNEL 1
CHANNEL 2
STBY
GND 15
GND
+
Ctramp
FBx
1V25
GND
+
GND
5V0
V
DD
V
DD
V
DD
GND
Vcc OK
CPx
Int_Sync
+
STBY
DRVx
Int_Flux
ENx
GND
V
DD
LOGIC
LATCH
IENx
GND
CHANNEL x
Enable or
Int_sync
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MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltage on Pin 12 (Vcc), Pin 8 (CPm) and Pin 13/11 (DRV1/DRV2) 16 V
Maximum Voltage on all other pins except Pin 12 (Vcc), Pin 8 (CPm) and Pin 13/11
(DRV1/DRV2)
−0.3 to 6 V
Maximum Current into all pins except Pin 12 (Vcc) and Pin 13/11 (DRV1/DRV2)
when ESD diodes are activated
5 mA
Maximum current in Pin 7 (Sync) +3/−3 mA
Thermal Resistance, Junction−to−Case R
θ
JC
55 °C/W
Thermal Resistance, Junction−to−Air R
θ
JA
150 °C/W
Maximum Junction Temperature TJ
MAX
150 °C
Storage Temperature Range −60 to +150 °C
ESD Capability Human Body Model (HBM)
Machine Model (MM)
2
200
kV
V
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.

NCP4326DR2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC REG SECONDARY CTR 3OUT 16SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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