IR3502B
Page 22 of 38 V3.2
ROSC/OVP
OUTPUT
VOLTAGE
(VOSEN+)
1.8V
1.6V
VCCLDRV
VCCL UVLO
VCC
12V
VCCL+0.7V
VCCL+0.7V
1.73V
Figure 15 Over-voltage protection with pre-charging converter output Vo > 1.73V
VID + 0.13V
VCCL - 1V
SS/DEL
3.92V (4V-0.08V)
ROSC/OVP
OUTPUT
VOLTAGE
(VOSEN+)
VCCL+0.7V
VCCL+0.7V
0.6V
VCCLDRV
VCCL UVLO
1.73V
VCC
12V
Figure 16 Over-voltage protection with pre-charging converter output VID + 0.13V <Vo < 1.73V
IR3502B
Page 23 of 38 V3.2
In the event of a high side MOSFET short before power up, the OVP flag is activated with as little supply voltage as
possible, as shown in Figure 14. The VOSEN+ pin is compared against a fixed voltage of 1.73V (typical) for OVP
conditions at power-up. The ROSC/OVP pin will be pulled higher than 1.6V with VCCLDRV voltage as low as 1.8V.
An external MOSFET or comparator should be used to disable the silver box, activate a crowbar, or turn off the supply
source. The 1.8V threshold is used to prevent false over-voltage triggering caused by pre-charging of output
capacitors.
Pre-charging of converter may trigger OVP. If the converter output is pre-charged above 1.73V as shown in Figure 15,
ROSC/OVP pin voltage will be higher than 1.6V when VCCLDRV voltage reaches 1.8V. ROSC/OVP pin voltage will
be VCCLDRV-1V and rise with VCCLDRV voltage until VCCL is above UVLO threshold, after which ROSC/OVP pin
voltage will be VCCL-1V. The converter cannot start unless the over voltage condition stops and VCCL is cycled. If
the converter output is pre-charged 130mV above VDAC but lower than 1.73V, as shown in Figure 16, the converter
will soft start until SS/DEL voltage is above 3.92V (4.0V-0.08V). Then, over voltage comparator is activated and fault
latch is set.
OUTPUT
VOLTAGE
(VO)
VID DOWN
NORMAL
OPERATION
VDAC
VID
(FAST
VDAC)
OV
THRESHOLD
VDAC + 130mV
1.73V
NORMAL
OPERATION
VID UPLOW VID
VDAC
50mV
50mV
Figure 17 Over-voltage protection during dynamic VID
During dynamic VID down, OVP may be triggered when output voltage can not follow VDAC voltage change at light
load with large output capacitance. Therefore, over-voltage threshold is raised to 1.73V from VDAC+130mV
whenever dynamic VID is detected and the difference between output voltage and VDAC is more than 50mV, as
shown in Figure 19. The over-voltage threshold is changed back to VDAC+130mV if the difference is smaller than
50mV.
VID Fault Codes
VID codes of 0000000X and 1111111X for VR11 will set the fault latch and disable the error amplifier. A 1.3us delay
is provided to prevent a fault condition from occurring during Dynamic VID changes. A VID FAULT condition is
latched with boot voltage and can only be cleared by cycling power to VCCL or re-issuing ENABLE.
Voltage Regulator Ready (PGOOD)
The PGOOD pin is an open-collector output and should be pulled up to a voltage source through a resistor. After
the soft start completion cycle, the PGOOD remains high until the output voltage is in regulation and SS/DEL is
above 3.92V. The PGOOD pin becomes low if the fault latch, over voltage latch, open sense line latch, or open
daisy chain
IR3502B
Page 24 of 38 V3.2
is set. A high level at the PGOOD pin indicates that the converter is in operation and has no fault. The PGOOD
stays high as long as the output voltage is within 300 mV of the programmed VID. During start-up, it is pulled low
with an input voltage as low as 2 V. It stays low until the startup sequence has completed, and the output voltage
has moved to the programmed VID.
Open Voltage Loop Detection
The output voltage range of error amplifier is detected all the time to ensure the voltage loop is in regulation. If any
fault condition forces the error amplifier output above VCCL-1.08V for 8 switching cycles, the fault latch is set. The
fault latch can only be cleared by cycling power to VCCL.
Open Remote Sense Line Protection
If either remote sense line VOSEN+ or VOSEN- or both are open, the output of remote sense amplifier (VO) drops.
The IR3502B monitors VO pin voltage continuously. If VO voltage is lower than 200 mV, two separate pulse
currents are applied to VOSEN+ and VOSEN- pins respectively to check if the sense lines are open. If VOSEN+ is
open, a voltage higher than 90% of V(VCCL) will be present at VOSEN+ pin and the output of open line detect
comparator will be high. If VOSEN- is open, a voltage higher than 700mV will be present at VOSEN- pin and the
output of open-line-detect comparator will be high. The open sense line fault latch is set, which pulls error amplifier
output low immediately and shut down the converter. The SS/DEL voltage is discharged and the fault latch can only
be reset by cycling VCCL power. During dynamic VID down, OVP may be triggered when output voltage can not
follow VDAC voltage change at light load with large output capacitance. Therefore, over-voltage threshold is raised
to 1.73V from VDAC+130mV whenever dynamic VID is detected and the difference between output voltage and
VDAC is more than 50mV, as shown in Figure 17. The over-voltage threshold is changed back to VDAC+130mV if
the difference is smaller than 50mV.
Open Daisy Chain Protection
IR3502B checks the daisy chain every time it powers up. It starts a daisy chain pulse on the PHSOUT pin and
detects the feedback at PHSIN pin. If no pulse comes back after 32 CLKOUT pulses, the pulse is restarted again. If
the pulse fails to come back the second time, the open daisy chain fault is registered, and SS/DEL is not allowed to
charge. The fault latch can only be reset by cycling the power to VCCL.
After powering up, the IR3502B monitors PHSIN pin for a phase input pulse equal or less than the number of
phases detected. If PHSIN pulse does not return within the number of phases in the converter, another pulse is
started on PHSOUT pin. If the second started PHSOUT pulse does not return on PHSIN, an open daisy chain fault
is registered.
Enable Input
The ENABLE pin below 0.8V sets the Fault Latch and a voltage above 0.85V enables the soft start of the converter.
Thermal Monitoring (VRHOT)
A resistor divider including a thermistor at HOTSET pin sets the VRHOT threshold. The thermistor is usually placed
at the temperature sensitive region of the converter, and is linearized by a series resistor. The IR3502B compare
HOTSET pin voltage with a reference voltage of 1.6V. The VRHOT pin is an open-collector output and should be
pulled up to a voltage source through a resistor. If the thermal trip point is reached the VRHOT output drives low.
The hysteresis of the VRHOT comparator helps eliminate toggling of VRHOT output.
The overall system must be considered when designing for OVP. In many cases the over-current protection of the
AC-DC or DC-DC converter supplying the multiphase converter will be triggered and provide effective protection
without damage as long as all PCB traces and components are sized to handle the worst-case maximum current. If
this is not possible, a fuse can be added in the input supply to the multiphase converter.

IR3502BMTRPBF

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
Power Management Specialized - PMIC X-PHASE CONTROL IC AMD SVID CTRL IC
Lifecycle:
New from this manufacturer.
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