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IR3502BMTRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P38
IR3502B
Page 4 of 38 V3.2
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over: 8VVin16V, VCCL = 6.8V±3.4%, -0.3V VOSEN-
0.3V, 0
o
C T
J
100
o
C, 7.75K ROSC 50.0 K, CSS/DEL = 0.1F +/-10%.
PARAMETER TEST CONDITION MIN TYP MAX UNIT
VDAC Reference
VID 1V -0.5 0.5 %
0.8V VID < 1V -5 +5 mV
System Set-Point Accuracy
0.5V VID < 0.8V -8 +8 mV
Source & Sink Currents Include OCSET and VSETPT currents 30 44 58
A
VIDx Input Threshold 500 600 700 mV
VIDx Input Bias Current 0VV(VIDx)2.5V. -1 0 1
A
VIDx OFF State Blanking Delay Measure time till PGOOD drives low 0.5 1.3 2.1
s
Oscillator
ROSC Voltage 0.570 0.595 0.620 V
CLKOUT High Voltage I(CLKOUT)= -10 mA, measure V(VCCL)
– V(CLKOUT).
1 V
CLKOUT Low Voltage I(CLKOUT)= 10 mA 1 V
PHSOUT Frequency ROSC = 50.0 K 225 250 275 kHz
PHSOUT Frequency ROSC = 24.5 K 450 500 550 kHz
PHSOUT Frequency ROSC = 7.75 K 1.35 1.50 1.65 MHz
PHSOUT High Voltage I(PHSOUT)= -1 mA, measure V(VCCL)
– V(PHSOUT)
1 V
PHSOUT Low Voltage I(PHSOUT)= 1 mA 1 V
PHSIN Threshold Voltage Compare to V(VCCL) 30 50 70 %
VDAC Buffer Amplifier
Input Offset Voltage V(VDAC_BUFF) – V(VDAC), 0.5V
V(VDAC) 1.6V, < 1mA load
-5 0 9 mV
Source Current 0.5V V(VDAC) 1.6V 0.3 0.44 0.6 mA
Sink Current 0.5V V(VDAC) 1.6V 3.5 13 20 mA
Unity Gain Bandwidth Note 1 3.5 MHz
Slew Rate Note 1 1.5
V/s
Thermal Compensation Amplifier
Output Offset Voltage 0V V(IIN) – V(VDAC) 1.6V, 0.5V
V(VDAC) 1.6V, Req/R2 = 2
-10 0 10 mV
Source Current 0.5V V(VDAC) 1.6V 3 8 15 mA
Sink Current 0.5V V(VDAC) 1.6V 0.3 0.4 0.5 mA
Unity Gain Bandwidth Note 1, Req/R2 = 2 2 4.5 7 MHz
Slew Rate Note 1 5.5
V/s
Current Report Amplifier
Output Offset Voltage V(VDRP)–V(VDAC) = 0,225,450,900mV -15 0 15 mV
IR3502B
Page 5 of 38 V3.2
PARAMETER TEST CONDITION MIN TYP MAX UNIT
Source Current 0.5V V(IMON) 0.9V 5 9 15 mA
Sink Resistance 0.5V V(IMON) 0.9V 5 10 17 k
Unity Gain Bandwidth Note 1 1 MHz
Input Filter Time Constant 1
s
Max Output Voltage 1.04 1.09 1.145 V
Soft Start and Delay
Start Delay (TD1) 1.0 2.9 3.5 ms
Soft Start Time (TD2) 0.8 2.2 3.25 ms
VID Sample Delay (TD3) 0.3 1.2 3.0 ms
PGOOD Delay (TD4 + TD5) 0.5 1.2 2.3 ms
OC Delay Time V(VDRP) – V(DACBUFF) = 1.67 mV 75 125 300 us
SS/DEL to FB Input Offset
Voltage
With FB = 0V, adjust V(SS/DEL) until
EAOUT drives high
0.7 1.4 1.9 V
Charge Current 35.0 52.5 70.0
A
Discharge Current 2.5 4.5 6.5
A
Charge/Discharge Current Ratio 10 12 16
A/A
Charge Voltage 3.6 4.0 4.2 V
Delay Comparator Threshold
Relative to Charge Voltage, SS/DEL rising
50 80 125 mV
Delay Comparator Threshold
Relative to Charge Voltage, SS/DEL falling
85 120 160 mV
Delay Comparator Input Filter 5
s
Delay Comparator Hysteresis 10 30 60 mV
VID Sample Delay Comparator
Threshold
2.8 3.0 3.2 V
Discharge Comp. Threshold 150 200 275 mV
Remote Sense Differential Amplifier
Unity Gain Bandwidth Note 1 3.0 6.4 9.0 MHz
Input Offset Voltage 0.5V V(VOSEN+) - V(VOSEN-) 1.6V -3 0 3 mV
Sink Current 0.5V V(VOSEN+) - V(VOSEN-) 1.6V 0.4 1 2 mA
Source Current 0.5V V(VOSEN+) - V(VOSEN-) 1.6V 3 9 20 mA
Slew Rate 0.5V V(VOSEN+) - V(VOSEN-) 1.6V 2 4 8 V/us
VOSEN+ Bias Current 0.5 V < V(VOSEN+) < 1.6V 100 uA
VOSEN- Bias Current -0.3V VOSEN- 0.3V, All VID Codes 160 275 uA
High Voltage V(VCCL) – V(VO) 1.5 2 2.5 V
Low Voltage V(VCCL)=7V 50 mV
Error Amplifier
Input Offset Voltage Measure V(FB) – V(VSETPT). Note 2 -1 0 1 mV
FB Bias Current -1 0 1
A
VSETPT Bias Current ROSC= 24.5 K 23.00 24.25 25.50
A
DC Gain Note 1 100 110 120 dB
Bandwidth Note 1 20 30 40 MHz
Slew Rate Note 1 7 12 20
V/s
Sink Current 0.40 0.85 1.00 mA
Source Current 5 8 12 mA
Maximum Voltage Measure V(VCCL) – V(EAOUT) 500 780 950 mV
IR3502B
Page 6 of 38 V3.2
PARAMETER TEST CONDITION MIN TYP MAX UNIT
Minimum Voltage 120 250 mV
Open Voltage Loop Detection
Threshold
Measure V(VCCL) - V(EAOUT),
Relative to Error Amplifier maximum
voltage.
125 300 600 mV
Open Voltage Loop Detection
Delay
Measure PHSOUT pulse numbers from
V(EAOUT) = V(VCCL) to PGOOD =
low.
8 Pulses
Enable Input
VR 11 Threshold Voltage ENABLE rising 825 850 875 mV
VR 11 Threshold Voltage ENABLE falling 775 800 825 mV
VR 11 Hysteresis 25 50 75 mV
Bias Current 0V V(ENABLE) 3.3V -5 0 5
A
Blanking Time Noise Pulse < 100ns will not register an
ENABLE state change. Note 1
75 250 400 ns
Over-Current Comparator
Input Offset Voltage 1V V(IIN) 3.3V -40 -25 -10 mV
Input Filter Time Constant 2
S
Over-Current Threshold VDRP-VDAC_BUFF 1.07 1.17 1.27 V
Over-Current Delay Counter ROSC = 7.75 K (PHSOUT=1.5MHz) 4096 Cycle
Over-Current Delay Counter ROSC = 15.0 K (PHSOUT=800kHz) 2048 Cycle
Over-Current Delay Counter ROSC = 50.0 K (PHSOUT=250kHz) 1024 Cycle
Over-Current Limit Amplifier
Input Offset Voltage -10 0 10 mV
Transconductance Note 1 0.50 1.00 1.75 mA/V
Sink Current 35 55 75 uA
Unity Gain Bandwidth Note 1 0.75 2.00 3.00 kHz
Over Voltage Protection (OVP) Comparators
Threshold at Power-up Measure at 1.5V VCCLDRV 1.1 1.21 1.30 V
Threshold during Normal
Operation
Compare to V(VDAC) 105 125 145 mV
OVP Release Voltage during
Normal Operation
Compare to V(VDAC) -13 3 20 mV
Threshold during Dynamic VID
down
1.70 1.73 1.75 V
Dynamic VID Detect Comparator
Threshold
25 50 75 mV
Propagation Delay to IIN Measure time from V(VO) > V(VDAC)
(250mV overdrive) to V(IIN) transition to
> 0.9 * V(VCCL).
90 180 nS
IIN Pull-up Resistance 5 15
Propagation Delay to OVP Measure time from V(VO) > V(VDAC)
(250mV overdrive) to V(ROSC/OVP)
transition to >1V.
90 180 nS
OVP High Voltage Measure V(VCCL)-V(ROSC/OVP) 0 1.2 V
OVP Power-up High Voltage ROSC = 7.75 K. Measure
V(VCCLDRV)-V(ROSC/OVP) @ 1.5V
.100 .240 .375 V
OVP Power-up High Voltage ROSC = 24.5 K. Measure
V(VCCLDRV)-V(ROSC/OVP) @ 1.5V
0 0.2
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P38

IR3502BMTRPBF

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Buy IR3502BMTRPBF
Manufacturer:
Infineon Technologies
Description:
Power Management Specialized - PMIC X-PHASE CONTROL IC AMD SVID CTRL IC
Lifecycle:
New from this manufacturer.
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