IR3502B
Page 8 of 38 V3.2
PIN DESCRIPTION
PIN# PIN SYMBOL PIN DESCRIPTION
1-8 VID7-0 Inputs to VID D to A Converter.
9 ENABLE Enable input. A logic low applied to this pin puts the IC into fault mode. Do not float
this pin as the logic state will be undefined.
10 VRHOT Open collector output of the VRHOT comparator which drives low if HOTSET pin
voltage is lower than 1.6V. Connect external pull-up.
11 HOTSET A resistor divider including thermistor senses the temperature, which is used for
VRHOT comparator.
12 VOSEN- Remote sense amplifier input. Connect to ground at the load.
13 VOSEN+ Remote sense amplifier input. Connect to output at the load.
14 VO Remote sense amplifier output.
15 FB Inverting input to the Error Amplifier.
16 EAOUT Output of the error amplifier.
17 VDRP Buffered, scaled and thermally compensated IIN signal. Connect an external RC
network to FB to program converter output impedance.
18 VN Node for DCR thermal compensation network.
19 VDAC_BUFF Buffered VDAC.
20 VSETPT Error amplifier non-inverting input. Converter output voltage can be decreased from
the VDAC voltage with an external resistor connected between VDAC and this pin
(there is an internal sink current at this pin).
21 VDAC Regulated voltage programmed by the VID inputs. Connect an external RC network
to LGND to program dynamic VID slew rate and provide compensation for the
internal buffer amplifier.
22 SS/DEL Programs converter startup and over current protection delay timing. It is also used
to compensate the constant output current loop during soft start. Connect an
external capacitor to LGND to program.
23 ROSC/OVP Connect a resistor to LGND to program oscillator frequency and OCSET, VSETPT
and VDAC bias currents. Oscillator frequency equals switching frequency per phase.
The pin voltage is 0.6V during normal operation and higher than 1.6V if an over-
voltage condition is detected.
24 LGND Local Ground for internal circuitry and IC substrate connection.
25 CLKOUT Clock output at switching frequency multiplied by phase number. Connect to CLKIN
pins of phase ICs.
26 PHSOUT Phase clock output at switching frequency per phase. Connect to PHSIN pin of the
first phase IC.
27 PHSIN Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC.
28 VCCL Voltage regulator and IC power input. Connect a decoupling capacitor to LGND.
29 IIN Average current input from the phase IC(s). This pin is also used to communicate
over voltage condition to phase ICs.
30 VCCLDRV Output of the VCCL regulator error amplifier to control external transistor. The pin
senses 12V power supply through a resistor.
31 PGOOD Open collector output that drives low during startup and under any external fault
condition. Indicates converter within regulation. Connect external pull-up.
32 IMON Voltage at IOUT pin will be proportional to load current.
