MAX11603EEE+ Datasheet MAX11600EKA+T, MAX11603EEE+, MAX11605EEE+ | P4-P6

MAX11600–MAX11605

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,

4-/8-/12-Channel 2-Wire Serial 8-Bit ADCs

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

= 2.7V to 3.6V (MAX11601/MAX11603/MAX11605), V

= 4.5V to 5.5V (MAX11600/MAX11602/MAX11604). External reference,

REF

= 2.048V (MAX11601/MAX11603/MAX11605), V

REF

= 4.096V (MAX11600/MAX11602/MAX11604). External clock, f

SCL

1.7MHz, T

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

POWER REQUIREMENTS

MAX11601/MAX11603/MAX11605 2.7 3.6

Supply Voltage (Note 10) V

MAX11600/MAX11602/MAX11604 4.5 5.5

Internal REF, external clock 350 650

SAMPLE

188ksps

External REF, external clock 250

External REF, external clock 110

SAMPLE

75ksps

External REF, internal clock 150

External REF, external clock 8

SAMPLE

10ksps

External REF, internal clock 10

External REF, external clock 2

SAMPLE

1ksps

External REF, internal clock 2.5

Supply Current I

Power-down 1 10

µA

Power-Supply Rejection Ratio PSRR (Note 11) ±0.25 ±1 LSB/V

TIMING CHARACTERISTICS FOR 2-WIRE FAST MODE (Figures 1a and 2)

Serial-Clock Frequency f

SCL

400 kHz

Bus Fr ee Ti m e Betw een a S TO P ( P )

and a S TART ( S ) C ond i ti on

BUF

1.3 µs

Hold Time for START Condition t

HD.STA

0.6 µs

Low Period of the SCL Clock t

LOW

1.3 µs

High Period of the SCL Clock t

HIGH

0.6 µs

Setup Time for a Repeated START

Condition (Sr)

SU.STA

0.6 µs

Data Hold Time t

HD.DAT

(Note 12) 0 150 ns

Data Setup Time t

SU.DAT

100 ns

Rise Time of Both SDA and SCL

Signals, Receiving

(Note 13) 20 + 0.1C

300 ns

Fall Time of SDA Transmitting t

(Note 13) 20 + 0.1C

300 ns

Setup Time for STOP Condition t

SU.STO

0.6 µs

Capacitive Load for Each Bus Line C

400 pF

Pulse Width of Spike Suppressed t

50 ns

TIMING CHARACTERISTICS FOR 2-WIRE HIGH-SPEED MODE (Figures 1b and 2)

Serial-Clock Frequency f

SCLH

(Note 14) 1.7 MHz

Hold Time (Repeated) START

Condition

HD.STA

160 ns

Low Period of the SCL Clock t

LOW

320 ns

High Period of the SCL Clock t

HIGH

120 ns

Setup Time for a Repeated START

Condition (Sr)

STA

160 ns

MAX11600–MAX11605

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,

4-/8-/12-Channel 2-Wire Serial 8-Bit ADCs

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

= 2.7V to 3.6V (MAX11601/MAX11603/MAX11605), V

= 4.5V to 5.5V (MAX11600/MAX11602/MAX11604). External reference,

REF

= 2.048V (MAX11601/MAX11603/MAX11605), V

REF

= 4.096V (MAX11600/MAX11602/MAX11604). External clock, f

SCL

1.7MHz, T

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Data Hold Time t

DAT

(Note 12) 0 150 ns

Data Setup Time t

DAT

10 ns

Rise Time of SCL Signal

(Current Source Enabled)

RCL

(Note 13) 20 80 ns

Rise Time of SCL Signal After

Acknowledge Bit

RCL1

(Note 13) 20 160 ns

Fall Time of SCL Signal t

FCL

(Note 13) 20 80 ns

Rise Time of SDA Signal t

RDA

(Note 13) 20 160 ns

Fall Time of SDA Signal t

FDA

(Note 13) 20 160 ns

Setup Time for STOP Condition t

STO

160 ns

Capacitive Load for Each Bus Line C

400 pF

Pulse Width of Spike Suppressed t

010ns

Note 1: The MAX11600/MAX11602/MAX11604 are tested at V

= 5V and the MAX11601/MAX11603/MAX11605 are tested at V

= 3V. All devices are configured for unipolar, single-ended inputs.

Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and

offsets have been calibrated.

Note 3: Offset nulled.

Note 4: Ground on channel; sine wave applied to all off channels.

Note 5: Conversion time is defined as the number of clock cycles (eight) multiplied by the clock period. Conversion time does not

include acquisition time. SCL is the conversion clock in the external clock mode.

Note 6: The absolute voltage range for the analog inputs (AIN0–AIN11) is from GND to V

Note 7: When AIN_/REF (MAX11600/MAX11601/MAX11604/MAX11605) or REF (MAX11602/MAX11603) is configured to be an inter-

nal reference (SEL[2:1] = 11), decouple AIN_/REF or REF to GND with a 0.01µF capacitor.

Note 8: The switch connecting the reference buffer to AIN_/REF or REF has a typical on-resistance of 675Ω.

Note 9: ADC performance is limited by the converter’s noise floor, typically 1.4mV

P-P

Note 10: Electrical characteristics are guaranteed from V

DD(MIN)

to V

DD(MAX)

. For operation beyond this range, see the

Typical

Operating Characteristics

Note 11: Power-supply rejection ratio is measured as:

for the MAX11601/MAX11603/MAX11605, where N is the number of bits.

Power-supply rejection ratio is measured as:

for the MAX11600/MAX11602/MAX11604, where N is the number of bits.

Note 12: A master device must provide a data hold time for SDA (referred to V

of SCL) to bridge the undefined region of

SCL’s falling edge (Figure 1).

Note 13: C

= total capacitance of one bus line in pF. t

, t

FDA

, and t

measured between 0.3V

and 0.7V

. The minimum value is

specified at T

= +25°C with C

= 400pF.

Note 14: f

SCLH

must meet the minimum clock low time plus the rise/fall times.

VVVV

FS FS

REF

55 45

()

−

()

[]

−

VVVV

FS FS

REF

33 27

()

−

()

[]

−

MAX11600–MAX11605

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,

4-/8-/12-Channel 2-Wire Serial 8-Bit ADCs

6 _______________________________________________________________________________________

Typical Operating Characteristics

= 3.3V (MAX11601/MAX11603/MAX11605), V

= 5V (MAX11600/MAX11602/MAX11604), f

SCL

= 1.7MHz, external clock (33% duty

cycle), f

SAMPLE

= 188ksps, single ended, unipolar, T

= +25°C, unless otherwise noted.)

150

250

200

350

300

400

450

SUPPLY CURRENT

vs. VOLTAGE

MAX11600 toc01

(V)

(µA)

2.5 3.5 4.03.0 4.5 5.0 5.5

A) INTERNAL 4.096V

REF

B) INTERNAL 2.048V

REF

C) EXTERNAL 4.096V

REF

D) EXTERNAL 2.048V

REF

150

250

200

350

300

400

450

-40 85

SUPPLY CURRENT

vs. TEMPERATURE

MAX11600 toc02

TEMPERATURE (

(µA)

10-15 35 60

INTERNAL 4.096V

REF

INTERNAL 2.048V

REF

EXTERNAL 4.096V

REF

EXTERNAL 2.048V

REF

2.5 3.53.0 4.0 4.5 5.0 5.5

SHUTDOWN SUPPLY CURRENT

vs.

SUPPLY VOLTAGE

MAX11600 toc03

(V)

(µA)

SDA = SCL = V

-40 10-15 35 60 85

SHUTDOWN SUPPLY CURRENT

vs.

TEMPERATURE

MAX11600 toc04

TEMPERATURE (°C)

(µA)

SDA = SCL = V

= 5V

= 3.3V

100

200

150

300

250

350

0203010 40 50 60

AVERAGE SUPPLY CURRENT vs.

CONVERSION RATE (INTERNAL CLOCK)

MAX11600 toc05

CONVERSION RATE (ksps)

AVERAGE I

(µA)

A) INTERNAL REF ALWAYS ON

B) INTERNAL REF AUTOSHUTDOWN

C) EXTERNAL REF

INTERNAL CLOCK MODE

SCL

= 1.7MHz

150

100

300

250

200

450

400

350

500

010050 150 200

AVERAGE SUPPLY CURRENT VS.

CONVERSION RATE (EXTERNAL CLOCK)

MAX11600 toc06

CONVERSION RATE (ksps)

AVERAGE I

(µA)

A) INTERNAL REF ALWAYS ON

B) INTERNAL REF AUTOSHUTDOWN

C) EXTERNAL REF

EXTERNAL CLOCK MODE

SCL

= 1.7MHz

0.9900

0.9925

0.9950

0.9975

1.0000

1.0025

1.0050

1.0075

1.0100

4.00 4.504.25 4.75 5.00 5.25 5.50

NORMALIZED 4.096V REFERENCE VOLTAGE

vs. SUPPLY VOLTAGE

MAX11600 toc7

(V)

REF

NORMALIZED

0.980

0.985

0.990

0.995

1.000

1.005

1.010

1.015

1.020

-40 -15 10 35 60 85

INTERNAL 4.096V REFERENCE VOLTAGE

vs. TEMPERATURE

MAX11600 toc08

TEMPERATURE (°C)

REF

NORMALIZED

0.9900

0.9925

0.9950

0.9975

1.0000

1.0025

1.0050

1.0075

1.0100

2.5 3.53.0 4.0 4.5 5.0 5.5

INTERNAL 2.048V REFERENCE VOLTAGE

vs. SUPPLY VOLTAGE

MAX11600 toc09

(V)

REF

NORMALIZED

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P23

MAX11603EEE+

Mfr. #:

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Manufacturer:

Maxim Integrated

Description:

Analog to Digital Converters - ADC 8-Bit 8Ch 188ksps 3.6V Precision ADC

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