4 DS861PP3
CS5346
LIST OF TABLES
Table 1. Speed Modes .............................................................................................................................. 19
Table 2. Common Clock Frequencies ....................................................................................................... 19
Table 3. Slave Mode Serial Bit Clock Ratios ............................................................................................. 20
Table 4. Device Revision .......................................................................................................................... 28
Table 5. Freeze-able Bits .......................................................................................................................... 28
Table 6. Functional Mode Selection .......................................................................................................... 29
Table 7. Digital Interface Formats ............................................................................................................. 29
Table 8. MCLK Frequency ........................................................................................................................ 30
Table 9. PGAOut Source Selection ........................................................................................................... 30
Table 10. Example Gain and Attenuation Settings ................................................................................... 31
Table 11. PGA Soft Cross or Zero Cross Mode Selection ........................................................................ 32
Table 12. Analog Input Multiplexer Selection ............................................................................................ 32
DS861PP3 5
CS5346
1. PIN DESCRIPTIONS - CS5346
Pin Name # Pin Description
SDA/CDOUT 1
Serial Control Data (Input/Output) - SDA is a data I/O in I²C
®
Mode. CDOUT is the output data line for
the control port interface in SPI
TM
Mode.
SCL/CCLK 2 Serial Control Port Clock (Input) - Serial clock for the serial control port.
AD0/CS
3
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C Mode;
CS
is the chip-select signal for SPI format.
AD1/CDIN 4
Address Bit 1 (I²C) / Serial Control Data Input (SPI) (Input) - AD1 is a chip address pin in I²C Mode;
CDIN is the input data line for the control port interface in SPI Mode.
VLC 5
Control Port Power (Input) - Determines the required signal level for the control port interface. Refer
to the Recommended Operating Conditions for appropriate voltages.
RST
6 Reset (Input) - The device enters a low-power mode when this pin is driven low.
AIN3A
AIN3B
7
8
Stereo Analog Input 3 (Input) - The full-scale level is specified in the Analog Characteristics specifica-
tion table.
AIN2A
AIN2B
9
10
Stereo Analog Input 2 (Input) - The full-scale level is specified in the Analog Characteristics specifica-
tion table.
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37
36
35
34
33
32
31
30
29
28
27
26
25
VLSSDA/CDOUT
AGND
OVFL
SCL/CCLK
AD0/CS
AD1/CDIN
VLC
RST
AIN3A
AIN3B
AIN2A
AIN2B
AIN1A
AIN1B
VA
AFILTB
VQ
VQ
FILT+
NC
AIN4A/MICIN1
AIN4B/MICIN2
AIN5A
AIN5B
AFILTA
NC
NC
NC
AGND
NC
NC
PGAOUTB
PGAOUTA
AIN6B
AIN6A
MICBIAS
INT
VD
DGND
MCLK
LRCK
SCLK
SDOUT
NC
NC
NC
NC
CS5346
6 DS861PP3
CS5346
AIN1A
AIN1B
11
12
Stereo Analog Input 1 (Input) - The full-scale level is specified in the Analog Characteristics specifica-
tion table.
AGND 13 Analog Ground (Input) - Ground reference for the internal analog section.
VA 14 Analog Power (Input) - Positive power for the internal analog section.
AFILTA 15 Anti-alias Filter Connection (Output) - Antialias filter connection for the channel A ADC input.
AFILTB 16 Anti-alias Filter Connection (Output) - Antialias filter connection for the channel B ADC input.
VQ
17
18
Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage.
FILT+ 19 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
NC 20
No Connect - This pin is not connected internally and should be tied to ground to minimize any poten-
tial coupling effects.
AIN4A/MICIN1
AIN4B/MICIN2
21
22
Stereo Analog Input 4 / Microphone Input 1 & 2 (Input) - The full-scale level is specified in the Ana-
log Characteristics specification table.
AIN5A
AIN5B
23
24
Stereo Analog Input 5 (Input) - The full-scale level is specified in the Analog Characteristics specifica-
tion table.
MICBIAS 25
Microphone Bias Supply (Output) - Low
-noise bias supply for external microphone. Electrical charac-
teristics are specified in the DC Electrical Characteristics specification table.
AIN6A
AIN6B
26
27
Stereo Analog Input 6 (Input) - The full-scale level is specified in the Analog Characteristics specifica-
tion table.
PGAOUTA
PGAOUTB
28
29
PGA Analog Audio Output (Output) - Either an analog output from the PGA block or high impedance.
See “PGAOut Source Select (Bit 6)” on page 30.
NC
30
31
No Connect - These pins are not connected internally and should be tied to ground to minimize any
potential coupling effects.
AGND 32 Analog Ground (Input) - Ground reference for the internal analog section.
NC
33
34
35
No Connect - These pins are not connected internally and should be tied to ground to minimize any
potential coupling effects.
VLS 36
Serial Audio Interface Power (Input) - Determines the required signal level for the serial audio inter-
face. Refer to the Recommended Operating Conditions for appropriate voltages.
NC
37
38
39
40
No Connect - These pins are not connected internally and should be tied to ground to minimize any
potential coupling effects.
SDOUT 41 Serial Audio Data Output (Output) - Output for two’s complement serial audio data.
SCLK 42 Serial Clock (Input/Output) - Serial clock for the serial audio interface.
LRCK 43
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
MCLK 44 Master Clock (Input) - Clock source for the ADC’s delta-sigma modulators.
DGND 45 Digital Ground (Input) -
Ground reference for the internal digital section.
VD 46 Digital Power (Input) - Positive power for the internal digital section.
INT 47 Interrupt (Output) - Indicates an interrupt condition has occurred.
OVFL 48 Overflow (Output) - Indicates an ADC overflow condition is present.

CS5346-CQZ

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Audio A/D Converter ICs 103dB, 24Bit, 192kHz Stereo Audio ADC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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