MAX2361/MAX2363/MAX2365
Complete Dual-Band
Quadrature Transmitters
10 ______________________________________________________________________________________
Pin Description (continued)
PIN
MAX2361
MAX2363 MAX2365
NAME FUNCTION
16, 17 16, 17
IFOUTH-,
IFOUTH+
Differential IF Outputs. These ports are active when the register bit IF_SEL is
1. They do not support FM mode. These pins must be inductively pulled up
to V
CC
. A differential IF bandpass filter is connected between this port and
IFINH+ or IFINH-. The pullup inductors can be part of the filter structure. The
differential output impedance of this port is nominally 600. The transmission
lines from these pins should be short to minimize the pickup of spurious sig-
nals and noise.
18, 19 18, 19
IFOUTL-,
IFOUTL+
Differential IF Outputs. These ports are active when the register bit IF_SEL is
0. These pins must be inductively pulled up to V
CC
. A differential IF band-
pass filter is connected between this port and IFINL+ and IFINL-. The pullup
inductors can be part of the filter structure. The differential output impedance
of this port is nominally 600. The transmission lines from these pins should
be short to minimize the pickup of spurious signals and noise.
20 20 20 GC
RF and IF Gain Control Analog Input. Apply 0.6V to 2.4V to control the gain of
the RF and IF stages. An RC filter on this pin should be used to reduce DAC
noise or PDM clock spurs from this line.
21 21 21 V
CC
Supply Pin for the IF VGA. Bypass with a capacitor as close to the pin as
possible. The bypass capacitor must not share its ground vias with any other
branches.
22 22 22 V
CC
Supply for the I/Q Modulator. Bypass with a capacitor as close to the pin as
possible. The bypass capacitor must not share its ground vias with any other
branches.
23, 24 23, 24 23, 24 Q+, Q-
Differential Q-Channel Baseband Inputs to the Modulator. These pins go
directly to the bases of a differential pair and require an external common-
mode bias voltage.
25, 26 25, 26 25, 26 I+, I-
Differential I-Channel Baseband Inputs to the Modulator. These pins go
directly to the bases of a differential pair and require an external common-
mode bias voltage.
27 27 27
SHDN
Shutdown Input, Drive to Logic High for Normal Operation. A logic low on
SHDN shuts down the entire IC except the serial interface and retains the
information in all registers. An R-C lowpass can be used to filter digital noise.
28 28 28 V
CC
Supply Pin to the VCO Section. Bypass as close to the pin as possible. The
bypass capacitor should not share its vias with any other branches.
29 29 29 IFLO
Buffered LO Output. Control the output buffer using register bit BUF_EN and
the divide ratio using the register bit BUF_DIV.
30, 31 30, 31
TANKL-,
TANKL+
Differential Tank Pins for the Low-Frequency IF VCO. These pins are internally
biased. VCO_SEL = 0 selects this IF VCO.
MAX2361/MAX2363/MAX2365
Complete Dual-Band
Quadrature Transmitters
______________________________________________________________________________________ 11
Pin Description (continued)
34, 35
1, 8, 9, 18,
19, 30, 31,
34, 35, 44
No Connection. Make no connection to these pins.
2, 10, 11,
16, 17,
32–35
43, 47
N.C.
MAX2361 MAX2363
FUNCTION
32, 33 32, 33
Differential Tank Pins for the High-Frequency IF VCO. These pins are internally
biased. VCO_SEL = 1 selects this IF VCO.
39 39
Supply Pin for Digital Circuitry. Bypass as close to the pin as possible. The
bypass capacitor must not share its vias with any other branch.
38 38
High-Impedance Output of the IF Charge Pump. Connect to the tune input of
the IF VCOs through the IF PLL loop filter. Keep the line from IFCP to the tune
input as short as possible to prevent spurious pick-up, and connect the loop
filter as close to the tune input as possible.
37 37
Supply for the IF Charge Pump. This supply can differ from the system V
CC
.
Bypass as close to the pin as possible. The bypass capacitor must not share
its vias with any other branches.
36 36
Reference Frequency Input. REF is internally biased and must be AC-cou-
pled to the reference source. This is a high-impedance port (25k
II
3pF).
44 Low-band RF LO Input Port. AC-couple to this port.
43 43 High-band RF LO Input Port. AC-couple to this port.
42 42 RF PLL Input. AC-couple this port to the RF VCO. RFPLL is internally biased.
41 41
Supply for the RF Charge Pump. This supply can differ from the system V
CC
.
Bypass as close to the pin as possible. The bypass capacitor must not share
its vias with any other branches.
40 40
High-Impedance Output of the RF Charge Pump. Connect to the tune input
of the RF VCOs through the RF PLL loop filter. Keep the line from this pin to
the tune input as short as possible to prevent spurious pickup, and connect
the loop filter as close to the tune input as possible.
PIN
MAX2365
39
38
37
36
44
42
41
40
NAME
TANKH-,
TANKH+
V
CC
IFCP
V
CCIFCP
REF
LOL
LOH
RFPLL
V
CCRFCP
RFCP
45, 46, 48 45, 46, 48
Isolation GND. No internal connection. Connect to PC board ground plane for
better isolation.
45, 46, 48 GND
47 47
Transmitter RF Output for PCS Band (1700MHz to 2000MHz). This open-col-
lector output requires a pullup inductor to the supply voltage. The pullup
inductor may be part of the output matching network and can be connected
directly to the battery. For split band PCS application, use RFH1 for the
1850MHz–1880MHz range.
RFH1
EP EP
DC and AC GND Return for the IC. Connect to PC board ground plane using
multiple vias.
EP GND
MAX2361/MAX2363/MAX2365
Complete Dual-Band
Quadrature Transmitters
12 ______________________________________________________________________________________
Detailed Description
The MAX2361 complete quadrature transmitter accepts
differential I/Q baseband inputs with external common-
mode bias. A modulator upconverts this to IF frequency
in the 120MHz to 380MHz range. A gain-control voltage
pin (GC) controls the gain of both the IF and RF VGAs
simultaneously to achieve the best current consumption
and linearity performance. The IF signal is brought off-
chip for filtering, then fed to a single sideband upcon-
verter followed by the RF VGA and PA driver. The RF
upconverter requires an external VCO for operation.
The IF PLL, RF PLL, and operating mode can be pro-
grammed by an SPI/QSPI/MICROWIRE-compatible 3-
wire interface.
The following sections describe each block in the
MAX2361 Functional Diagram.
I/Q Modulator
Differential in-phase (I) and quadrature-phase (Q) input
pins are designed to be DC-coupled and biased with the
baseband output from a digital-to-analog converter
(DAC). I and Q inputs need a DC bias of V
CC
/2 and a
current-drive capability of 8µA. The I and Q inputs
capacitance is typically 0.3pF differential. Common-
mode voltage works within a 1.35V to (V
CC
- 1.25V)
range. The IF VCO output is fed into a divide-by-
two/quadrature generator block to derive quadrature LO
components to drive the IQ modulator. The output of the
modulator is fed into the VGA.
IF VCOs
There are two VCOs to support high IF and low IF fre-
quencies. The VCOs oscillate at twice the desired IF fre-
quency. Oscillation frequency is determined by external
tank components (see Applications Information). Typical
phase-noise performance for the tank is as shown in the
Typical Operating Characteristics. The high-band and
low-band VCOs can be selected independently of the IF
port being used.
IFLO Output Buffer
IFLO provides a buffered LO output when BUF_EN is 1.
The IFLO output frequency is equal to the VCO fre-
quency when BUF_DIV is 0, and half the VCO frequen-
cy when BUF_DIV is 1. The output power is -12dBm.
This output is intended for applications where the
receive IF is the same frequency as the transmit IF.
IF/RF PLL
The IF/RF PLL uses a charge-pump output to drive a
loop filter. The loop filter typically is passive second-
order lead lag filter. Outside the filter’s bandwidth,
phase noise is determined by the tank components.
The two components that contribute most significantly
to phase noise are the inductor and varactor. Use high-
Q inductors and varactors to maximize equivalent par-
allel resistance. The IF_TURBO_CHARGE,
RCP_TURBO1, and RCP_TURBO2 bits can be set to
enable turbo mode. Turbo mode provides maximum
charge-pump current during frequency acquisition.
Turbo mode is disabled after frequency acquisition is
achieved. When turbo mode is disabled, charge-pump
current returns to the programmed levels as set by ICP
and RCP bits in the CONFIG register (Table 3).
The PSS bit selects the RFPLL prescaler speed inde-
pendent of the MODE bits. This enables PCS band
VCO locking when transmitting in the cellular band. For
VCO frequency above 1300MHz, set PSS to 1.
IF VGA
The IF VGA allows varying an IF output level that is con-
trolled by GC voltage. The voltage range on GC of 0.6V
to 2.4V provides a gain-control range of 85dB. There
are two differential IF output ports from the VGA.
IFOUTL+/IFOUTL- are optimized for low IF operation
(120MHz to 235MHz); IFOUTH+/IFOUTH- support high
IF operation (120MHz to 380MHz). IFOUTL supports
FM mode by providing higher IF output level when
MODE is set to 00.
Single Sideband Mixer
The RF transmit mixer uses a single sideband architec-
ture to eliminate an off-chip RF filter. The single sideband
mixer has IF input stages that correspond to IF output
ports of the VGA. The mixer is followed by the RF VGA.
The RF VGA is controlled by the same GC pin as the IF
VGA to provide optimum current consumption and linear-
ity performance. The total power-control range is
>100dB.
PA Driver
The MAX2361 includes three power-amplifier (PA) dri-
vers. Each is optimized for the desired operating fre-
quency. RFL is optimized for cellular-band operation.
RFH0 and RFH1 are optimized for split-band PCS opera-
tion. Use RFH0 in single high-band output such as
TDMA or W-CDMA. The PA drivers have open-collector
outputs and require pullup inductors. The pullup induc-
tors can act as the shunt element in a shunt series
match.

MAX2361ETM+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
RF Transmitter Complete Dual-Band Quadrature Txr
Lifecycle:
New from this manufacturer.
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