OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

MAX6872ETJ+T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48
MAX6872/MAX6873
EEPROM-Programmable, Hex/Quad,
Power-Supply Sequencers/Supervisors
28 ______________________________________________________________________________________
Table 18. PO7 (MAX6872)/PO5 (MAX6873) Output Dependency
REGISTER
ADDRESS
EEPROM
MEMORY
ADDRESS
BIT OUTPUT ASSERTION CONDITIONS
[0] 1 = PO7/PO5 assertion depends on IN1 primary undervoltage threshold (Table 2).
[1] 1 = PO7/PO5 assertion depends on IN2 primary undervoltage threshold (Table 3).
[2] 1 = PO7/PO5 assertion depends on IN3 primary undervoltage threshold (Table 4).
[3] 1 = PO7/PO5 assertion depends on IN4 primary undervoltage threshold (Table 4).
[4]
1 = PO7 (MAX6872 only) assertion depends on IN5 primary undervoltage threshold (Table 4).
Must be set to 0 for the MAX6873.
[5]
1 = PO7 (MAX6872 only) assertion depends on IN6 primary undervoltage threshold (Table 4).
Must be set to 0 for the MAX6873.
[6] 1 = PO7/PO5 assertion depends on watchdog 1 (Tables 25 and 26).
32h 8032h
[7] 1 = PO7/PO5 assertion depends on watchdog 2 (Tables 25 and 26).
[0] 1 = P O7/P O5 asser ti on d ep end s on IN 1 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 2) .
[1] 1 = P O7/P O5 asser ti on d ep end s on IN 2 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 3) .
[2] 1 = P O7/P O5 asser ti on d ep end s on IN 3 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 4) .
[3] 1 = P O7/P O5 asser ti on d ep end s on IN 4 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 4) .
[4]
1 = PO7 (MAX6872 only) assertion depends on IN5 secondary undervoltage/overvoltage
threshold (Table 4). Must be set to 0 for the MAX6873.
[5]
1 = PO7 (MAX6872 only) assertion depends on IN6 secondary undervoltage/overvoltage
threshold (Table 4). Must be set to 0 for the MAX6873.
[6] 1 = PO7/PO5 assertion depends on GPI1 (Table 5).
33h 8033h
[7] 1 = PO7/PO5 assertion depends on GPI2 (Table 5).
[0] 1 = PO7/PO5 assertion depends on GPI3 (Table 5).
[1] 1 = PO7/PO5 assertion depends on GPI4 (Table 5).
[2] 1 = P O7 ( M AX 6872 onl y) asser ti on d ep end s on P O1 ( Tab l e 8) . M ust b e set to 0 for the M AX 6873.
[3] 1 = P O7 ( M AX 6872 onl y) asser ti on d ep end s on P O2 ( Tab l e 9) . M ust b e set to 0 for the M AX 6873.
[4] 1 = PO7/PO5 assertion depends on PO3 (MAX6872)/PO1 (MAX6873) (Tables 10 and 11).
[5] 1 = PO7/PO5 assertion depends on PO4 (MAX6872)/PO2 (MAX6873) (Tables 12 and 13).
[6] 1 = PO7/PO5 assertion depends on PO5 (MAX6872)/PO3 (MAX6873) (Tables 14 and 15).
34h 8034h
[7] 1 = PO7/PO5 assertion depends on PO6 (MAX6872)/PO4 (MAX6873) (Tables 16 and 17).
35h 8035h [0] 1 = P O7 ( M AX 6872 onl y) asser ti on d ep end s on P O8 ( Tab l e 19) . M ust b e set to 0 for the M AX 6873.
40h 8040h [6] 1 = PO7 asserts when MR = low (Table 6).
Table 18 only applies to PO7 of the MAX6872 and PO5
of the MAX6873. Write a 0 to a bit to make the PO7/PO5
output independent of the respective signal (IN_ primary
or secondary thresholds, WD1 or WD2, GPI1–GPI4, MR,
or other programmable outputs).
MAX6872/MAX6873
EEPROM-Programmable, Hex/Quad,
Power-Supply Sequencers/Supervisors
______________________________________________________________________________________ 29
Table 19 only applies to PO8 of the MAX6872. Write a 0
to a bit to make the PO8 output independent of the
respective signal (IN1–IN6 primary or secondary
thresholds, WD1 or WD2, GPI1–GPI4, MR, or other pro-
grammable outputs).
Output Stage Configurations
Independently program each programmable output as
active high or active low (Table 20). Additionally, pro-
gram each programmable output as weak pullup, push-
pull, open-drain, or charge pump (Tables 21 and 22).
Every programmable output can be configured as
open-drain or weak pullup; however, only PO1–PO4
(MAX6872) or PO1–PO2 (MAX6873) can be configured
as charge-pump outputs, and only PO5–PO8
(MAX6872) or PO3–PO5 (MAX6873) can be configured
as push-pull outputs. Finally, set the PO_ timeout period
for each programmable output (Table 23).
An internal 10kΩ resistor provides the pullup resistance
for outputs configured as weak pullup stages. Program
each weak pullup output stage to refer to ABP or one of
the IN3–IN6 inputs. The programmable outputs source up
to 10mA and sink up to 4mA when configured as push-
pull stages. Program each push-pull output stage to ref-
erence to one of IN3–IN6. PO1–PO4 (MAX6872)/
PO1–PO2 (MAX6873) pull to V
ABP
+ 5V when configured
as charge-pump outputs.
Table 19. PO8 (MAX6872 only) Output Dependency
REGISTER
ADDRESS
EEPROM
MEMORY
ADDRESS
BIT OUTPUT ASSERTION CONDITIONS
[0] 1 = PO8 assertion depends on IN1 primary undervoltage threshold (Table 2).
[1] 1 = PO8 assertion depends on IN2 primary undervoltage threshold (Table 3).
[2] 1 = PO8 assertion depends on IN3 primary undervoltage threshold (Table 4).
[3] 1 = PO8 assertion depends on IN4 primary undervoltage threshold (Table 4).
[4] 1 = PO8 assertion depends on IN5 primary undervoltage threshold (Table 4).
[5] 1 = PO8 assertion depends on IN6 primary undervoltage threshold (Table 4).
[6] 1 = PO8 assertion depends on watchdog 1 (Tables 25 and 26).
36h 8036h
[7] 1 = PO8 assertion depends on watchdog 2 (Tables 25 and 26).
[0] 1 = PO8 assertion depends on IN1 secondary undervoltage/overvoltage threshold (Table 2).
[1] 1 = PO8 assertion depends on IN2 secondary undervoltage/overvoltage threshold (Table 3).
[2] 1 = PO8 assertion depends on IN3 secondary undervoltage/overvoltage threshold (Table 4).
[3] 1 = PO8 assertion depends on IN4 secondary undervoltage/overvoltage threshold (Table 4).
[4] 1 = PO8 assertion depends on IN5 secondary undervoltage/overvoltage threshold (Table 4).
[5] 1 = PO8 assertion depends on IN6 secondary undervoltage/overvoltage threshold (Table 4).
[6] 1 = PO8 assertion depends on GPI1 (Table 5).
37h 8037h
[7] 1 = PO8 assertion depends on GPI2 (Table 5).
[0] 1 = PO8 assertion depends on GPI3 (Table 5).
[1] 1 = PO8 assertion depends on GPI4 (Table 5).
[2] 1 = PO8 assertion depends on PO1 (Table 8).
[3] 1 = PO8 assertion depends on PO2 (Table 9).
[4] 1 = PO8 assertion depends on PO3 (Tables 10 and 11).
[5] 1 = PO8 assertion depends on PO4 (Tables 12 and 13).
[6] 1 = PO8 assertion depends on PO5 (Tables 14 and 15).
38h 8038h
[7] 1 = PO8 assertion depends on PO6 (Tables 16 and 17).
39h 8039h [0] 1 = PO8 assertion depends on PO7 (Table 18).
40h 8040h [7] 1 = PO8 asserts when MR = low (Table 6).
MAX6872/MAX6873
EEPROM-Programmable, Hex/Quad,
Power-Supply Sequencers/Supervisors
30 ______________________________________________________________________________________
Table 20. Programmable Output Active States
REGISTER
ADDRESS
EEPROM
MEMORY
ADDRESS
BIT
RANGE
DESCRIPTION
[0] PO1 (MAX6872 only). 0 = active low, 1 = active high.
[1] PO2 (MAX6872 only). 0 = active low, 1 = active high.
[2] PO3 (MAX6872)/PO1 (MAX6873). 0 = active low, 1 = active high.
[3] PO4 (MAX6872)/PO2 (MAX6873). 0 = active low, 1 = active high.
[4] PO5 (MAX6872)/PO3 (MAX6873). 0 = active low, 1 = active high.
[5] PO6 (MAX6872)/PO4 (MAX6873). 0 = active low, 1 = active high.
[6] PO7 (MAX6872)/PO5 (MAX6873). 0 = active low, 1 = active high.
3Ah 803Ah
[7] PO8 (MAX6872 only). 0 = active low, 1 = active high.
REGISTER
ADDRESS
EEPROM
MEMORY
ADDRESS
BIT
RANGE
AFFECTED
OUTPUT
DESCRIPTION
11h 8011h [6:4] PO1
15h 8015h [6:4] PO2
1Ch 801Ch [7:5] PO3
23h 8023h [7:5] PO4
000 = open drain, 001 = weak pullup to IN3, 010 = weak pullup to IN4,
011 = weak pullup to IN5, 100 = weak pullup to IN6, 101 = weak pullup to
ABP, 110 = charge-pump output, 111 = not used.
2Ah 802Ah [7:4] PO5
31h 8031h [7:4] PO6
35h 8035h [7:4] PO7
39h 8039h [7:4] PO8
0000 = open drain, 0001 = weak pullup to IN3, 0010 = weak pullup to IN4,
0011 = weak pullup to IN5, 0100 = weak pullup to IN6, 0101 = weak pullup to
ABP, 0110 = push-pull to IN3, 0111 = push-pull to IN4, 1000 = push-pull to
IN5, 1001 = push-pull to IN6, 1010–1111 = not used.
Table 21. Programmable Output Stage Options (MAX6872)
Table 22. Programmable Output Stage Options (MAX6873)
REGISTER
ADDRESS
EEPROM
MEMORY
ADDRESS
BIT
RANGE
AFFECTED
OUTPUT
DESCRIPTION
1Ch 801Ch [7:5] PO1
23h 8023h [7:5] PO2
000 = open drain, 001 = weak pullup to IN3, 010 = weak pullup to IN4,
011–100 = not used, 101 = weak pullup to ABP, 110 = charge-pump output,
111 = not used.
2Ah 802Ah [7:4] PO3
31h 8031h [7:4] PO4
35h 8035h [7:4] PO5
0000 = open drain, 0001 = weak pullup to IN3, 0010 = weak pullup to IN4,
0011–0100 = not used, 0101 = weak pullup to ABP, 0110 = push-pull to IN3,
0111 = push-pull to IN4, 1000–1111 = not used.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48

MAX6872ETJ+T

Mfr. #:
Buy MAX6872ETJ+T
Manufacturer:
Maxim Integrated
Description:
Supervisory Circuits EEPROM-Prog Hex Power-Sup Sequence
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet