Revision history SPC563Mxx
46/48 Doc ID 13850 Rev 6
08-Jun-2011 5
Replaced in all document “... Architecture Book E compliant...” with “...
Architecture technology compliant...”
Updated “Introduction”: Added “Document overview” and “Description”
sections.
Made the following changes in the “Description” section:
– Added “Floating Point Unit (FPU)” bullet under “Single issue, 32-bit
Power Architecture technology compliant e200z335 CPU core
complex”.
– Changed “eTPU” to “eTPU2” in the “32-channel second-generation
enhanced time processor unit” sentence.
– Changed the “Available in LQFP100, LQFP144, LQFP176 and
LBGA208” sentence to “Designed for LQFP100, LQFP144, LQFP176,
and LBGA208 packages“.
Replaced all instances of “Microsecond Bus” with “Microsecond
Channel”.
Replaced all instances of “SPC563M54” and “SPC563M60” with
“SPC563M54P”and “SPC563M60P”, respectively.
Changed the “Standby SRAM size” of the SPC563M60P device from
“24” to “32”.
Replaced all instances of “downlink” with “downstream” and “uplink” with
“upstream”.
Made the following changes in the “Flash” section:
Changed “Program page size of 128 bits (four words) to accelerate
programming” to “Program page size of 64 bits (two words)”.
Changed “Erase suspend, program suspend and erase-suspended
program” to “Erase suspend”.
Made editorial changes in the “BAM” section: Updated the conditional
tags in the “Supports serial bootloading...” sentences.
Changed “Shared time bases with the eTPU through the counter buses”
to “Shared time bases with the eTPU2 through the counter buses” in the
“eMIOS” section.
Removed the following sentences from the “eTPU2” section:
“For Monaco 1.5M, the eTPU2 has been further enhanced with these
features:”
“Timebases and channels are run at full system clock speed”
“Programmable channel mode allows customization of channel function”
“More flexibility in requesting DMA and interrupt service”
“Channel flags can be tested”
Added the following sentence in the “eQADC” section under the “Priority
based Queues” bullet: “Streaming mode operation of Queue_0 to
execute some commands several times”.
Changed the following sentences in the “DSPI” section:
“The DSPI can be configured ... that implements ... the Microsecond Bus
protocol” to “The DSPI can be configured ... that supports ... the
Microsecond Channel protocol”.
“The DSPI pins support 5 V logic levels or Low Voltage Differential
Signalling (LVDS) to improve high speed operation.” to “The DSPI ouput
pins support 5 V logic levels or Low Voltage Differential Signalling
(LVDS) according to the Microsecond Channel specification.”
Table 4. Revision history
Date Revision Description