2000 Jul 31 22
NXP Semiconductors Product specification
Audio CODEC UDA1342TS
9.1 Reset
A 1-bit value to initialize the L3-bus and I
2
C-bus registers
except the system register (00H) with default settings by
setting bit RST = 1.
Table 20 Reset bit
9.2 Quick mode switch
A 1-bit value to enable the quick mode change of the ADC.
The soft mode change works only between modes if
bit AM2 = 1.
Table 21 Quick mode switch
9.3 Bypass mixer DC filter
A 1-bit value to disable the DC filter of the ADC mixer. This
DC filter is in front of the mixer to prevent clipping inside
the mixer due to DC signals.
Table 22 Mixer DC filtering
9.4 DC filter
A 1-bit value to enable the DC filter of the ADC output. This
DC filter is inside the decimation filter.
Table 23 DC-filtering
9.5 ADC mode
A 3-bit value to select the mode of the ADC.
Table 24 ADC mode
9.6 ADC polarity
A 1-bit value to control the ADC polarity.
Table 25 Polarity control of the ADC
9.7 System clock frequency
A 2-bit value to select the external clock frequency.
Table 26 System clock frequency settings
RST FUNCTION
0no reset
1 reset registers to default
QS FUNCTION
0 soft mode change
1 quick mode change
MDC FUNCTION
0 enable mixer DC filtering
1 disable mixer DC filtering
DC FUNCTION
0 disable output DC filtering
1 enable output DC filtering
AM2 AM1 AM0 FUNCTION
000ADC power-off
0 0 1 input 1 select (input 2 off)
0 1 0 input 2 select (input 1 off)
0 1 1 not used
1 0 0 channel swap and signal inversion
1 0 1 input 1 select (double differential
mode)
1 1 0 input 2 select (double differential
mode)
1 1 1 mixing mode
PAD FUNCTION
0 non-inverting
1 inverting
SC1 SC0 FUNCTION
0 0 256f
s
0 1 384f
s
1 0 512f
s
1 1 768f
s
