OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

SC16C850VIBS,151

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48
SC16C850V All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 19 January 2011 37 of 48
NXP Semiconductors
SC16C850V
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
10.1 Timing diagrams
Fig 7. General write timing
upper address
002aac35
AD7 to AD0
CS
LLA
IOW
lower address data
t
w(LLA)
t
su(A-LLAH)
t
h(LLAH-A)
t
d(CS-LLAH)
t
w(IOW)
t
d(IOW)
t
su(D-IOWH)
t
h(IOWH-D)
t
d(LLAH-IOWL)
Fig 8. General read timing
upper address
002aac35
5
AD7 to AD0
CS
LLA
IOR
lower address data
t
w(LLA)
t
su(A-LLAH)
t
h(LLAH-A)
t
w(IOR)
t
d(IOR-DV)
t
d(IOR)
t
dis(IOR-QZ)
t
d(LLAH-IORL)
t
d(CS-LLAH)
SC16C850V All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 19 January 2011 38 of 48
NXP Semiconductors
SC16C850V
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
Fig 9. Modem input/output timing
t
d(IOW-Q)
change of state
t
d(IOR-INTL)
002aac55
9
t
d(modem-INT)
change of state
change of state change of state
active
active active active
active active active
change of state
RTS
DTR
IOW
CD
CTS
DSR
INT
IOR
RI
t
d(modem-INT)
t
d(modem-INT)
Fig 10. External clock timing
external clock
002aac35
7
t
w(clk)
t
WL
t
WH
f
XTAL1
1
t
wclk()
---------------
=
SC16C850V All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 19 January 2011 39 of 48
NXP Semiconductors
SC16C850V
Single UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
Fig 11. Receive timing
D0 D1 D2 D3 D4 D5 D6 D7
active
active
16 baud rate clock
002aac56
0
RX
INT
IOR
t
d(IOR-INTL)
t
d(stop-INT)
5 data bits
6 data bits
7 data bits
stop
bit
parity
bit
start
bit
data bits (0 to 7)
next
data
start
bit
Fig 12. Transmit timing
active
transmitter ready
active
16 baud rate clock
002aac56
1
t
d(IOW-INTL)
INT
IOW
active
D0 D1 D2 D3 D4 D5 D6 D7
TX
5 data bits
6 data bits
7 data bits
stop
bit
parity
bit
start
bit
data bits (0 to 7)
next
data
start
bit
t
d(start-INT)
t
d(IOW-TX)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48

SC16C850VIBS,151

Mfr. #:
Buy SC16C850VIBS,151
Manufacturer:
NXP Semiconductors
Description:
IC UART SINGLE W/FIFO 32-HVQFN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet