LT3757/LT3757A
10
3757afd
applicaTions inForMaTion
INTV
CC
Regulator Bypassing and Operation
An internal, low dropout (LDO) voltage regulator produces
the 7.2V INTV
CC
supply which powers the gate driver,
as shown in Figure 1. If a low input voltage operation is
expected (e.g., supplying power from a lithium-ion battery
or a 3.3V logic supply), low threshold MOSFETs should
be used. The LT3757 contains an undervoltage lockout
comparator A8 and an overvoltage lockout comparator
A9 for the INTV
CC
supply. The INTV
CC
undervoltage (UV)
threshold is 2.7V (typical), with 100mV hysteresis, to
ensure that the MOSFETs have sufficient gate drive voltage
before turning on. The logic circuitry within the LT3757 is
also powered from the internal INTV
CC
supply.
The INTV
CC
overvoltage (OV) threshold is set to be 17.5V
(typical) to protect the gate of the power MOSFET. When
INTV
CC
is below the UV threshold, or above the OV thresh-
old, the GATE pin will be forced to GND and the soft-start
operation will be triggered.
The INTV
CC
regulator must be bypassed to ground imme-
diately adjacent to the IC pins with a minimum of 4.7µF cera-
mic capacitor. Good bypassing is necessary to supply the
high transient currents required
by the MOSFET gate driver.
In an actual application, most of the IC supply current is
used to drive the gate capacitance of the power MOSFET.
The on-chip power dissipation can be a significant concern
when a large power MOSFET is being driven at a high fre-
quency and the V
IN
voltage is high. It is important to limit
the power dissipation through selection of MOSFET and/
or operating frequency so the LT3757 does not exceed its
maximum junction temperature rating. The junction tem-
perature T
J
can be estimated using the following equations:
T
J
= T
A
+ P
IC
θ
JA
T
A
= ambient temperature
θ
JA
= junction-to-ambient thermal resistance
P
IC
= IC power consumption
= V
IN
• (I
Q
+ I
DRIVE
)
I
Q
= V
IN
operation I
Q
= 1.6mA
I
DRIVE
= average gate drive current = fQ
G
f = switching frequency
Q
G
= power MOSFET total gate charge
The LT3757 uses packages with an Exposed Pad for en-
hanced thermal conduction. With proper soldering to the
Exposed Pad on the underside of the package and a full
copper plane underneath the device, thermal resistance
(θ
JA
) will be about 43°C/W for the DD package and 40°C/W
for the MSE package. For an ambient board temperature of
T
A
= 70°C and maximum junction temperature of 125°C,
the maximum I
DRIVE
(I
DRIVE(MAX)
) of the DD package can
be calculated as:
I
DRIVE(MAX)
=
(T
J
T
A
)
(θ
JA
V
IN
)
I
Q
=
1.28W
V
IN
1.6mA
The LT3757 has an internal INTV
CC
I
DRIVE
current limit
function to protect the IC from excessive on-chip power
dissipation. The I
DRIVE
current limit decreases as the V
IN
increases (see the INTV
CC
Minimum Output Current vs V
IN
graph in the Typical Performance Characteristics section).
If I
DRIVE
reaches the current limit, INTV
CC
voltage will fall
and may trigger the soft-start.
Based on the preceding equation and the INTV
CC
Minimum
Output Current vs V
IN
graph, the user can calculate the
maximum MOSFET gate charge the LT3757 can drive at
a given V
IN
and switch frequency. A plot of the maximum
Q
G
vs V
IN
at different frequencies to guarantee a minimum
4.5V INTV
CC
is shown in Figure 2.
As illustrated in Figure 2, a trade-off between the operating
frequency and the size of the power MOSFET may be needed
in order to maintain a reliable IC junction temperature.
Figure 2. Recommended Maximum Q
G
vs V
IN
at Different
Frequencies to Ensure INTV
CC
Higher Than 4.5V
V
IN
(V)
0
Q
G
(nC)
200
250
150
100
10 20
5
15 30 4025 35
50
0
300
3757 F02
300kHz
1MHz
LT3757/LT3757A
11
3757afd
applicaTions inForMaTion
Prior to lowering the operating frequency, however, be
sure to check with power MOSFET manufacturers for their
most recent low Q
G
, low R
DS(ON)
devices. Power MOSFET
manufacturing technologies are continually improving, with
newer and better performance devices being introduced
almost yearly.
An effective approach to reduce the power consumption
of the internal LDO for gate drive is to tie the INTV
CC
pin
to an external voltage source high enough to turn off the
internal LDO regulator.
If the input voltage V
IN
does not exceed the absolute
maximum rating of both the power MOSFET gate-source
voltage (V
GS
) and the INTV
CC
overvoltage lockout threshold
voltage (17.5V), the INTV
CC
pin can be shorted directly
to the V
IN
pin. In this condition, the internal LDO will be
turned off and the gate driver will be powered directly
from the input voltage, V
IN
. With the INTV
CC
pin shorted to
V
IN
, however, a small current (around 16µA) will load the
INTV
CC
in shutdown mode. For applications that require
the lowest shutdown mode input supply current, do not
connect the INTV
CC
pin to V
IN
.
In SEPIC or flyback applications, the INTV
CC
pin can be
connected to the output voltage V
OUT
through a blocking
diode, as shown in Figure 3, if V
OUT
meets the following
conditions:
1. V
OUT
< V
IN
(pin voltage)
2. V
OUT
< 17.5V
3. V
OUT
< maximum V
GS
rating of power MOSFET
A resistor R
VCC
can be connected, as shown in Figure 3, to
limit the inrush current from V
OUT
. Regardless of whether
or not the INTV
CC
pin is connected to an external voltage
source, it is always necessary to have the driver circuitry
bypassed with a 4.7µF low ESR ceramic capacitor to
ground immediately adjacent to the INTV
CC
and GND pins.
Figure 3. Connecting INTV
CC
to V
OUT
C
VCC
4.7µF
V
OUT
3757 F03
INTV
CC
GND
LT3757
R
VCC
D
VCC
Operating Frequency and Synchronization
The choice of operating frequency may be determined
by on-chip power dissipation, otherwise it is a trade-off
between efficiency and component size. Low frequency
operation improves efficiency by reducing gate drive cur-
rent and MOSFET and diode switching losses. However,
lower frequency operation requires a physically larger
inductor. Switching frequency also has implications for
loop compensation. The LT3757 uses a constant-frequency
architecture that can be programmed over a 100kHz to
1000kHz range with a single external resistor from the
RT pin to ground, as shown in Figure 1. The RT pin must
have an external resistor to GND for proper operation of
the LT3757. A table for selecting the value of R
T
for a given
operating frequency is shown in Table 1.
Table 1. Timing Resistor (R
T
) Value
OSCILLATOR FREQUENCY (kHz) R
T
(kΩ)
100 140
200 63.4
300 41.2
400 30.9
500 24.3
600 19.6
700 16.5
800 14
900 12.1
1000 10.5
The operating frequency of the LT3757 can be synchronized
to an external clock source. By providing a digital clock
signal into the SYNC pin, the LT3757 will operate at the
SYNC clock frequency. If this feature is used, an R
T
resistor
should be chosen to program a switching frequency 20%
slower than SYNC pulse frequency. The SYNC pulse should
have a minimum pulse width of 200ns. Tie the SYNC pin
to GND if this feature is not used.
LT3757/LT3757A
12
3757afd
applicaTions inForMaTion
Duty Cycle Consideration
Switching duty cycle is a key variable defining converter
operation. As such, its limits must be considered. Minimum
on-time is the smallest time duration that the LT3757 is
capable of turning on the power MOSFET. This time is
generally about 220ns (typical) (see Minimum On-Time
in the Electrical Characteristics table). In each switching
cycle, the LT3757 keeps the power switch off for at least
220ns (typical) (see Minimum Off-Time in the Electrical
Characteristics table).
The minimum on-time and minimum off-time and the
switching frequency define the minimum and maximum
switching duty cycles a converter is able to generate:
Minimum duty cycle = minimum on-timefrequency
Maximum duty cycle = 1 – (minimum off-timefrequency)
Programming the Output Voltage
The output voltage (V
OUT
) is set by a resistor divider, as
shown in Figure 1. The positive and negative V
OUT
are set
by the following equations:
V
OUT,POSITIVE
= 1.6V 1+
R2
R1
V
OUT,NEGATIVE
= –0.8V 1+
R2
R1
The resistors R1 and R2 are typically chosen so that
the error caused by the current flowing into the FBX pin
during normal operation is less than 1% (this translates
to a maximum value of R1 at about 158k).
In the applications where V
OUT
is pulled up by an external
positive power supply, the FBX pin is also pulled up through
the R2 and R1 network. Make sure the FBX does not exceed
its absolute maximum rating (6V). The R5, D2, and D3 in
Figure 1 provide a resistive clamp in the positive direction.
To ensure FBX is lower than 6V, choose sufficiently large
R1 and R2 to meet the following condition:
6V 1+
R2
R1
+ 3.5V
R2
8k
> V
OUT(MAX)
where V
OUT(MAX)
is the maximum V
OUT
that is pulled up
by an external power supply.
Soft-Start
The LT3757 contains several features to limit peak switch
currents and output voltage (V
OUT
) overshoot during
start-up or recovery from a fault condition. The primary
purpose of these features is to prevent damage to external
components or the load.
High peak switch currents during start-up may occur in
switching regulators. Since V
OUT
is far from its final value,
the feedback loop is saturated and the regulator tries to
charge the output capacitor as quickly as possible, resulting
in large peak currents. A large surge current may cause
inductor saturation or power switch failure.
The LT3757 addresses this mechanism with the SS pin. As
shown in Figure 1, the SS pin reduces the power MOSFET
current by pulling down the V
C
pin through Q2. In this
way the SS allows the output capacitor to charge gradu-
ally toward its final value while limiting the start-up peak
currents. The typical start-up waveforms are shown in the
Typical Performance Characteristics section. The inductor
current I
L
slewing rate is limited by the soft-start function.
Besides start-up, soft-start can also be triggered by the
following faults:
1. INTV
CC
> 17.5V
2. INTV
CC
< 2.6V
3. Thermal lockout
Any of these three faults will cause the LT3757 to stop
switching immediately. The SS pin will be discharged by
Q3. When all faults are cleared and the SS pin has been
discharged below 0.2V, a 10µA current source I
S2
starts
charging the SS pin, initiating a soft-start operation.
The soft-start interval is set by the soft-start capacitor
selection according to the equation:
T
SS
= C
SS
1.25V
10µA

LT3757EDD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Boost, Fly, SEPIC & Inv Cntr
Lifecycle:
New from this manufacturer.
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