PIC18F2XXX/4XXX FAMILY
DS30009622M-page 10 2010-2015 Microchip Technology Inc.
TABLE 2-5: IMPLEMENTATION OF CODE MEMORY
FIGURE 2-9: MEMORY MAP AND THE CODE MEMORY SPACE
FOR PIC18FX4X0/X4X3 DEVICES
For PIC18F2480/4480 devices, the code memory space extends from 0000h to 03FFFh (16 Kbytes) in one 16-Kbyte
block. For PIC18F2580/4580 devices, the code memory space extends from 0000h to 07FFFh (32 Kbytes) in two
16-Kbyte blocks. Addresses, 0000h through 07FFh, however, define a “Boot Block” region that is treated separately
from Block 0. All of these blocks define code protection boundaries within the code memory space.
The size of the Boot Block in PIC18F2480/2580/4480/4580 devices can be configured as 1 or 2K words (see
Figure 2-10). This is done through the BBSIZ<0> bit in the Configuration register, CONFIG4L. It is important to note that
increasing the size of the Boot Block decreases the size of Block 0.
Device Code Memory Size (Bytes)
PIC18F2410
000000h-003FFFh (16K)
PIC18F2420
PIC18F2423
PIC18F2450
PIC18F4410
PIC18F4420
PIC18F4450
000000h
200000h
3FFFFFh
1FFFFFh
Note: Sizes of memory areas are not to scale.
Code Memory
Unimplemented
Read as ‘0’
Configuration
and ID
Space
MEMORY SIZE/
DEVICE
16 Kbytes
(PIC18FX4X0/X4X3)
Address
Range
Boot Block
000000h
0007FFh
Block 0
000800h
001FFFh
Block 1 002000h
003FFFh
Unimplemented
Reads all ‘0’s
004000h
005FFFh
006000h
007FFFh
1FFFFFh
008000h
