PIC18F2XXX/4XXX FAMILY
DS30009622M-page 34 2010-2015 Microchip Technology Inc.
4.2 Verify Code Memory and ID Locations
The verify step involves reading back the code memory space and comparing it against the copy held in the
programmer’s buffer. Memory reads occur a single byte at a time, so two bytes must be read to compare against the
word in the programmer’s buffer. Refer to Section 4.1 “Read Code Memory, ID Locations and Configuration Bits”
for implementation details of reading code memory.
The Table Pointer must be manually set to 200000h (base address of the ID locations) once the code memory has been
verified. The post-increment feature of the Table Read 4-bit command may not be used to increment the Table Pointer
beyond the code memory space. In a 64-Kbyte device, for example, a post-increment read of address, FFFFh, will wrap
the Table Pointer back to 000000h, rather than point to the unimplemented address, 010000h.
FIGURE 4-2: VERIFY CODE MEMORY FLOW
4.3 Verify Configuration Bits
A configuration address may be read and output on PGD via the 4-bit command, ‘1001’. Configuration data is read and
written in a byte-wise fashion, so it is not necessary to merge two bytes into a word prior to a compare. The result may
then be immediately compared to the appropriate configuration data in the programmer’s memory for verification. Refer
to Section 4.1 “Read Code Memory, ID Locations and Configuration Bits” for implementation details of reading
configuration data.
Read Low Byte
Read High Byte
Does
Word = Expect
Data?
Failure,
Report
Error
All
code memory
verified?
No
Yes
No
Set TBLPTR = 0
Start
Set TBLPTR = 200000h
Yes
Read Low Byte
Read High Byte
Does
Word = Expect
Data?
Failure,
Report
Error
All
ID locations
verified?
No
Yes
Done
Yes
No
with Post-Increment
with Post-Increment
Increment
Pointer
with Post-Increment
with Post-Increment
