OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

PIC18F4510-E/ML

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P56
2010-2015 Microchip Technology Inc. DS30009622M-page 37
PIC18F2XXX/4XXX FAMILY
5.0 CONFIGURATION WORD
The PIC18F2XXX/4XXX Family devices have several Configuration Words. These bits can be set or cleared to select
various device configurations. All other memory areas should be programmed and verified prior to setting the Configuration
Words. These bits may be read out normally, even after read or code protection. See Table 5-1 for a list of Configuration
bits and Device IDs, and Table 5-3 for the Configuration bit descriptions.
5.1 ID Locations
A user may store identification information (ID) in eight ID locations, mapped in 200000h:200007h. It is recommended
that the Most Significant nibble of each ID be Fh. In doing so, if the user code inadvertently tries to execute from the ID
space, the ID data will execute as a NOP.
5.2 Device ID Word
The Device ID Word for the PIC18F2XXX/4XXX Family devices is located at 3FFFFEh:3FFFFFh. These bits may be
used by the programmer to identify what device type is being programmed and read out normally, even after code or
read protection.
In some cases, devices may share the same DEVID values. In such cases, the Most Significant bit of the device revision,
REV4 (DEVID1<4>), will need to be examined to completely determine the device being accessed.
See Table 5-2 for a complete list of Device ID values.
FIGURE 5-1: READ DEVICE ID WORD FLOW
Start
Set TBLPTR = 3FFFFE
Done
Read Low Byte
Read High Byte
with Post-Increment
with Post-Increment
PIC18F2XXX/4XXX FAMILY
DS30009622M-page 38 2010-2015 Microchip Technology Inc.
TABLE 5-1: CONFIGURATION BITS AND DEVICE IDS
File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default/
Unprogrammed
Value
300000h
(1,8)
CONFIG1L — — USBDIV CPUDIV1 CPUDIV0 PLLDIV2 PLLDIV1 PLLDIV0 --00 0000
300001h CONFIG1H IESO FCMEN
— — FOSC3 FOSC2 FOSC1 FOSC0
00-- 0111
00-- 0101
(1,8)
300002h CONFIG2L — —
—
BORV1 BORV0 BOREN1 BOREN0 PWRTEN
---1 1111
VREGEN
(1,8)
--01 1111
(1,8)
300003h CONFIG2H — — — WDTPS3 WDTPS2 WDTPS1 WDTPS0 WDTEN ---1 1111
300005h CONFIG3H MCLRE
— — — — LPT1OSC PBADEN
CCP2MX
(7)
1--- -011
(7)
— 1--- -01-
300006h CONFIG4L DEBUG
XINST
ICPRT
(1)
— —
LVP
—STVREN
100- -1-1
(1)
BBSIZ1 BBSIZ0 — 1000 -1-1
— BBSIZ
(3)
— 10-0 -1-1
(3)
ICPRT
(8)
—BBSIZ
(8)
100- 01-1
(8)
BBSIZ1
(2)
BBSIZ2
(2)
— 1000 -1-1
(2)
300008h CONFIG5L — —CP5
(10)
CP4
(9)
CP3
(4)
CP2
(4)
CP1 CP0 --11 1111
300009h CONFIG5H CPD CPB
— — — — — — 11-- ----
30000Ah CONFIG6L
— —WRT5
(10)
WRT4
(9)
WRT3
(4)
WRT2
(4)
WRT1 WRT0 --11 1111
30000Bh CONFIG6H WRTD WRTB WRTC
(5)
— — — — — 111- ----
30000Ch CONFIG7L
— — EBTR5
(10)
EBTR4
(9)
EBTR3
(4)
EBTR2
(4)
EBTR1 EBTR0 --11 1111
30000Dh CONFIG7H
— EBTRB — — — — — — -1-- ----
3FFFFEh DEVID1
(6)
DEV2 DEV1 DEV0 REV4 REV3 REV2 REV1 REV0 See Table 5-2
3FFFFFh DEVID2
(6)
DEV10 DEV9 DEV8 DEV7 DEV6 DEV5 DEV4 DEV3 See Table 5-2
Legend: - = unimplemented. Shaded cells are unimplemented, read as ‘0’.
Note 1: Implemented only on PIC18F2455/2550/4455/4550 and PIC18F2458/2553/4458/4553 devices.
2: Implemented on PIC18F2585/2680/4585/4680, PIC18F2682/2685 and PIC18F4682/4685 devices only.
3: Implemented on PIC18F2480/2580/4480/4580 devices only.
4: These bits are only implemented on specific devices based on available memory. Refer to Section 2.3 “Memory Maps”.
5: In PIC18F2480/2580/4480/4580 devices, this bit is read-only in Normal Execution mode; it can be written only in Program mode.
6: DEVID registers are read-only and cannot be programmed by the user.
7: Implemented on all devices with the exception of the PIC18FXX8X and PIC18F2450/4450 devices.
8: Implemented on PIC18F2450/4450 devices only.
9: Implemented on PIC18F2682/2685 and PIC18F4682/4685 devices only.
10: Implemented on PIC18F2685/4685 devices only.
2010-2015 Microchip Technology Inc. DS30009622M-page 39
PIC18F2XXX/4XXX FAMILY
TABLE 5-2: DEVICE ID VALUES
Device
Device ID Value
DEVID2 DEVID1
PIC18F2221 21h 011x xxxx
PIC18F2321 21h 001x xxxx
PIC18F2410 11h 011x xxxx
PIC18F2420 11h 010x xxxx
(1)
PIC18F2423 11h 010x xxxx
(2)
PIC18F2450 24h 001x xxxx
PIC18F2455 12h 011x xxxx
PIC18F2458 2Ah 011x xxxx
PIC18F2480 1Ah 111x xxxx
PIC18F2510 11h 001x xxxx
PIC18F2515 0Ch 111x xxxx
PIC18F2520 11h 000x xxxx
(1)
PIC18F2523 11h 000x xxxx
(2)
PIC18F2525 0Ch 110x xxxx
PIC18F2550 12h 010x xxxx
PIC18F2553 2Ah 010x xxxx
PIC18F2580 1Ah 110x xxxx
PIC18F2585 0Eh 111x xxxx
PIC18F2610 0Ch 101x xxxx
PIC18F2620 0Ch 100x xxxx
PIC18F2680 0Eh 110x xxxx
PIC18F2682 27h 000x xxxx
PIC18F2685 27h 001x xxxx
PIC18F4221 21h 010x xxxx
PIC18F4321 21h 000x xxxx
PIC18F4410 10h 111x xxxx
PIC18F4420 10h 110x xxxx
(1)
PIC18F4423 10h 110x xxxx
(2)
PIC18F4450 24h 000x xxxx
PIC18F4455 12h 001x xxxx
PIC18F4458 2Ah 001x xxxx
PIC18F4480 1Ah 101x xxxx
PIC18F4510 10h 101x xxxx
PIC18F4515 0Ch 011x xxxx
PIC18F4520 10h 100x xxxx
(1)
PIC18F4523 10h 100x xxxx
(2)
PIC18F4525 0Ch 010x xxxx
PIC18F4550 12h 000x xxxx
PIC18F4553 2Ah 000x xxxx
PIC18F4580 1Ah 100x xxxx
Legend: The ‘x’s in DEVID1 contain the device revision code.
Note 1: DEVID1 bit 4 is used to determine the device type (REV4 = 0).
2: DEVID1 bit 4 is used to determine the device type (REV4 = 1).
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P56

PIC18F4510-E/ML

Mfr. #:
Buy PIC18F4510-E/ML
Manufacturer:
Microchip Technology
Description:
8-bit Microcontrollers - MCU 32KB 1536 RAM 36I/O
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet