Data Sheet AD8307
Rev. E | Page 3 of 24
SPECIFICATIONS
V
S
= 5 V, T
A
= 25°C, R
L
≥ 1 M, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
GENERAL CHARACTERISTICS
Input Range (±3 dB Error) From noise floor to maximum input 92 dB
Input Range (±1 dB Error) From noise floor to maximum input 88 dB
Logarithmic Conformance f ≤ 100 MHz, central 80 dB ±0.3 ±1 dB
f = 500 MHz, central 75 dB ±0.5 dB
Logarithmic Slope Unadjusted
1
23 25 27 mV/dB
vs. Temperature 23 27 mV/dB
Logarithmic Intercept Sine amplitude, unadjusted
2
20 μV
Equivalent sine power in 50 Ω −87 −84 −77 dBm
vs. Temperature −88 −76 dBm
Input Noise Spectral Density Inputs shorted 1.5 nV/√Hz
Operating Noise Floor R
SOURCE
= 50 Ω/2 −78 dBm
Output Resistance Pin 4 to ground 10 12.5 15
Internal Load Capacitance 3.5 pF
Response Time Small signal, 10% to 90%, 0 mV to 100 mV, C
L
= 2 pF 400 ns
Large signal, 10% to 90%, 0 V to 2.4 V, C
L
= 2 pF 500 ns
Upper Usable Frequency 500 MHz
Lower Usable Frequency AC-coupled input 10 Hz
AMPLIFIER CELL CHARACTERISTICS
Cell Bandwidth −3 dB 900 MHz
Cell Gain 14.3 dB
INPUT CHARACTERISTICS
DC Common-Mode Voltage AC-coupled input 3.2 V
Common-Mode Range Either input (small signal) −0.3 +1.6 V
S
− 1 V
DC Input Offset Voltage
3
R
SOURCE
≤ 50 Ω 50 500 μV
Drift 0.8 μV/°C
Incremental Input Resistance Differential 1.1
Input Capacitance Either pin to ground 1.4 pF
Bias Current Either input 10 25 μA
POWER INTERFACES
Supply Voltage 2.7 5.5 V
Supply Current V
ENB
≥ 2 V 8 10 mA
Disabled V
ENB
≤ 1 V 150 750 μA
1
This can be adjusted downward by adding a shunt resistor from the output to ground. A 50 kΩ resistor reduces the nominal slope to 20 mV/dB.
2
This can be adjusted in either direction by a voltage applied to Pin 5, with a scale factor of 8 dB/V.
3
Normally nulled automatically by internal offset correction loop and can be manually nulled by a voltage applied between Pin 3 and ground; see the Applications
Information section.
AD8307 Data Sheet
Rev. E | Page 4 of 24
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Ratings
Supply 7.5 V
Input Voltage (Pin 1 and Pin 8) V
SUPPLY
Storage Temperature Range (N, R) −65°C to +125°C
Ambient Temperature Range, Rated
Performance Industrial, AD8307AN,
AD8307AR
−40°C to +85°C
Lead Temperature Range
(Soldering, 10 sec)
300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Data Sheet AD8307
Rev. E | Page 5 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
INP
VPS
ENB
INT
COM
OFS
OUT
INM
AD8307
TOP VIEW
(Not to Scale)
1
2
3
4
8
7
6
5
01082-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 INM Signal Input Minus Polarity. Normally at V
POS
/2.
2 COM Common Pin (Usually Grounded).
3 OFS Offset Adjustment. External capacitor connection.
4 OUT Logarithmic (RSSI) Output Voltage. R
OUT
= 12.5 kΩ.
5 INT Intercept Adjustment, ±3 dB. (See the Slope and Intercept Adjustments section.)
6 ENB CMOS-Compatible Chip Enable. Active when high.
7 VPS Positive Supply: 2.7 V to 5.5 V.
8 INP
Signal Input Plus Polarity. Normally at V
POS
/2. Due to the symmetrical nature of the response, there is no special
significance to the sign of the two input pins. DC resistance from INP to INM = 1.1 kΩ.

AD8307AR-REEL7

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Logarithmic Amplifiers DC to 500MHz 92dB
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