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AD7785BRUZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33
AD7785
Rev. 0 | Page 3 of 32
SPECIFICATIONS
AV
DD
= 2.7 V to 5.25 V; DV
DD
= 2.7 V to 5.25 V; GND = 0 V; all specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter AD7785B
1
Unit Test Conditions/Comments
ADC CHANNEL
Output Update Rate 4.17 to 470 Hz nom
No Missing Codes
2
20 Bits min
Resolution See Output Noise and Resolution Specifications
Output Noise and Update Rates See Output Noise and Resolution Specifications
Integral Nonlinearity ±15 ppm of FSR max
Offset Error
3
±1 μV typ
Offset Error Drift vs. Temperature
4
±10 nV/°C typ
Full-Scale Error
3, 5
±10 μV typ
Gain Drift vs. Temperature
4
±1 ppm/°C typ Gain = 1 to 16, external reference
±3 ppm/°C typ Gain = 32 to 128, external reference
Power Supply Rejection 100 dB min AIN = 1 V/gain, gain ≥ 4, external reference
ANALOG INPUTS
Differential Input Voltage Ranges ±V
REF
/Gain V nom
V
REF
= REFIN(+) − REFIN(−) or internal reference,
gain = 1 to 128
Absolute AIN Voltage Limits
2
Unbuffered Mode GND – 30 mV V min Gain = 1 or 2
AV
DD
+ 30 mV V max
Buffered Mode GND + 100 mV V min Gain = 1 or 2
AV
DD
– 100 mV V max
In-Amp Active GND + 300 mV V min Gain = 4 to 128
AV
DD
– 1.1 V max
Common-Mode Voltage, V
CM
0.5 V min
V
CM
= (AIN(+) + AIN(−))/2, gain = 4 to 128
Analog Input Current
Buffered Mode or In-Amp Active
Average Input Current
2
±1 nA max Gain = 1 or 2, update rate < 100 Hz
±250 pA max Gain = 4 to 128, update rate < 100 Hz
Average Input Current Drift ±2 pA/°C typ
Unbuffered Mode Gain = 1 or 2
Average Input Current ±400 nA/V typ Input current varies with input voltage
Average Input Current Drift ±50 pA/V/°C typ
Normal Mode Rejection
2
Internal Clock
@ 50 Hz, 60 Hz 65 dB min 80 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010
6
@ 50 Hz 80 dB min 90 dB typ, 50 ± 1 Hz, FS[3:0] = 1001
6
@ 60 Hz 90 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 1000
6
External Clock
@ 50 Hz, 60 Hz 80 dB min 90 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010
6
@ 50 Hz 94 dB min 100 dB typ, 50 ± 1 Hz, FS[3:0] = 1001
6
@ 60 Hz 90 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 1000
6
Common-Mode Rejection
@ DC 100 dB min AIN = 1 V/gain, gain ≥ 4
@ 50 Hz, 60 Hz
2
100 dB min 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010
6
@ 50 Hz, 60 Hz
2
100 dB min
50 ± 1 Hz (FS[3:0] = 1001)
6
, 60 ± 1 Hz
(FS[3:0] = 1000)
6
AD7785
Rev. 0 | Page 4 of 32
Parameter AD7785B
1
Unit Test Conditions/Comments
REFERENCE
Internal Reference
Internal Reference Initial Accuracy 1.17 ± 0.01% V min/max AV
DD
= 4 V, T
A
= 25°C
Internal Reference Drift
2
4 ppm/°C typ
15 ppm/°C max
Power Supply Rejection 85 dB typ
External Reference
External REFIN Voltage 2.5 V nom
REFIN = REFIN(+) − REFIN(−)
Reference Voltage Range
2
0.1 V min
AV
DD
V max
When V
REF
= AV
DD
, the differential input must be
limited to 0.9 × V
REF
/gain if the in-amp is active
Absolute REFIN Voltage Limits
2
GND − 30 mV
V min
AV
DD
+ 30 mV V max
Average Reference Input Current 400 nA/V typ
Average Reference Input Current
Drift
±0.03 nA/V/°C typ
Normal Mode Rejection Same as for analog inputs
Common-Mode Rejection 100 dB typ
EXCITATION CURRENT SOURCES
(IEXC1 and IEXC2)
Output Current 10/210/1000 μA nom
Initial Tolerance at 25°C ±5 % typ
Drift 200 ppm/°C typ
Current Matching ±0.5 % typ Matching between IEXC1 and IEXC2; V
OUT
= 0 V
Drift Matching 50 ppm/°C typ
Line Regulation (V
DD
) 2 %/V typ AV
DD
= 5 V ± 5%
Load Regulation 0.2 %/V typ
Output Compliance
AV
DD
− 0.65
V max 10 μA or 210 μA currents selected
AV
DD
− 1.1
V max 1 mA currents selected
GND − 30 mV
V min
TEMPERATURE SENSOR
Accuracy
Sensitivity
±2
0.81
°C typ
mV/°C typ
Applies if user calibrates the temperature sensor
Applies if user calibrates the temperature sensor
BIAS VOLTAGE GENERATOR
V
BIAS
AV
DD
/2 V nom
V
BIAS
Generator Start-Up Time See Figure 10 ms/nF typ Dependent on the capacitance on the AIN pin
INTERNAL/EXTERNAL CLOCK
Internal Clock
Frequency
2
64 ± 3% kHz min/max
Duty Cycle 50:50 % typ
External Clock
Frequency 64 kHz nom
A 128 kHz external clock can be used if the
divide-by-2 function is used
(Bit CLK1 = CLK0 = 1)
Duty Cycle 45:55 to 55:45 % typ
Applies for external 64 kHz clock; a 128 kHz
clock can have a less stringent duty cycle
LOGIC INPUTS
CS
2
V
INL
, Input Low Voltage 0.8 V max DV
DD
= 5 V
V
INH
, Input High Voltage
0.4
2.0
V max
V min
DV
DD
= 3 V
DV
DD
= 3 V or 5 V
AD7785
Rev. 0 | Page 5 of 32
Parameter AD7785B
1
Unit Test Conditions/Comments
SCLK, CLK, and DIN (Schmitt-
Triggered Input)
2
V
T
(+) 1.4/2 V min/V max DV
DD
= 5 V
V
T
(–) 0.8/1.7 V min/V max DV
DD
= 5 V
V
T
(+) − V
T
(−)
0.1/0.17 V min/V max DV
DD
= 5 V
V
T
(+) 0.9/2 V min/V max DV
DD
= 3 V
V
T
(–) 0.4/1.35 V min/V max DV
DD
= 3 V
V
T
(+) − V
T
(−)
0.06/0.13 V min/V max DV
DD
= 3 V
Input Currents
Input Capacitance
±10
10
μA max
pF typ
V
IN
= DV
DD
or GND
All digital inputs
LOGIC OUTPUTS (INCLUDING CLK)
V
OH
, Output High Voltage
2
DV
DD
− 0.6
V min DV
DD
= 3 V, I
SOURCE
= 100 μA
V
OL
, Output Low Voltage
2
0.4 V max DV
DD
= 3 V, I
SINK
= 100 μA
V
OH
, Output High Voltage
2
4 V min DV
DD
= 5 V, I
SOURCE
= 200 μA
V
OL
, Output Low Voltage
2
0.4 V max
DV
DD
= 5 V, I
SINK
= 1.6 mA (DOUT/RDY)/
800 μA (CLK)
Floating-State Leakage Current ±10 μA max
Floating-State Output Capacitance 10 pF typ
Data Output Coding Offset binary
SYSTEM CALIBRATION
2
Full-Scale Calibration Limit +1.05 × FS V max
Zero-Scale Calibration Limit
−1.05 × FS
V min
Input Span 0.8 × FS V min
2.1 × FS V max
POWER REQUIREMENTS
7
Power Supply Voltage
AV
DD
to GND
2.7/5.25 V min/max
DV
DD
to GND
2.7/5.25 V min/max
Power Supply Currents
I
DD
Current 140 μA max
110 μA typ @ AV
DD
= 3 V, 125 μA typ @ AV
DD
= 5 V,
unbuffered mode, external reference
185 μA max
130 μA typ @ AV
DD
= 3 V, 165 μA typ @ AV
DD
= 5 V,
buffered mode, gain = 1 or 2, external reference
400 μA max
300 μA typ @ AV
DD
= 3 V, 350 μA typ @ AV
DD
= 5 V,
gain = 4 to 128, external reference
500 μA max
400 μA typ @ AV
DD
= 3 V, 450 μA typ @ AV
DD
= 5 V,
gain = 4 to 128, internal reference
I
DD
(Power-Down Mode) 1 μA max
1
Temperature range is –40°C to +105°C.
2
Specification is not production tested, but is supported by characterization data at initial product release.
3
Following a calibration, this error is in the order of the noise for the programmed gain and update rate selected.
4
Recalibration at any temperature removes these errors.
5
Full-scale error applies to both positive and negative full-scale and applies at the factory calibration conditions (AV
DD
= 4 V, gain = 1, T
A
= 25°C).
6
FS[3:0] are the four bits used in the mode register to select the output word rate.
7
Digital inputs equal to DV
DD
or GND with excitation currents and bias voltage generator disabled.
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AD7785BRUZ

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Buy AD7785BRUZ
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 3Ch Lo Noise Lo Pwr 20B w/ On-Chip Ref
Lifecycle:
New from this manufacturer.
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