DS2174
19 of 24
5. DC OPERATION
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground -1.0V to +5.5V
Operating Temperature Range for DS2174QN -40
°
C to +85°C
Storage Temperature Range -55°C to +125
°
C
Soldering Temperature Range See IPC/JEDEC J-STD-020A
This a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operation sections
of this specifications is not implied. Exposure to absolute maximum rating conditions for extended periods of time can affect reliability.
Table 5-A. RECOMMENDED DC OPERATING CONDITIONS
(T
A
= 0°C to +70°C for DS2174Q; T
A
= -40°C to +85°C for DS2174QN)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Logic 1 V
IH
2.2 5.5 V
Logic 0 V
IL
-0.3 +0.8 V
Supply Voltage V
DD
3.0 3.3 3.6 V
ESD Voltage, Any Pin 1500 V 1
NOTES:
1) Human body model.
Table 5-B. DC CHARACTERISTICS
(V
DD
= 3.0V to 3.6V, T
A
= 0°C to +70°C for DS2174Q; V
DD
= 3.0V to 3.6V, T
A
= -40°C to +85°C
for DS2174QN)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Supply Current I
DD
50 60 mA 1
Lead Capacitance C
IO
7pF
Input Leakage I
IL
-10 +10 µA 2
Input Leakage (with pullups) I
ILP
-500 +500 µA 2
Output Leakage I
LO
-10 +10 µA 3
Output Current at 2.4V I
OH
-4.0 mA
Output Current at 2.4V I
OH8
-8.0 mA 4
Output Current at 0.4V I
OL
+4.0 mA
Output Current at 0.4V I
OL8
+8.0 mA 4
NOTES:
1) TCLK = RCLK = 155MHz serial mode; outputs open-circuited or 80MHz byte mode.
2) 0V < V
IN
< V
DD
.
3) Applies to TDAT when tri-stated.
4) Applies to TDAT[0] and TCLKO.
DS2174
20 of 24
6. AC TIMING CHARACTERISTICS
6.1 Parallel Port
Figure 6-1. Read Timing
Table 6-A. PARALLEL PORT READ TIMING
(V
DD
= 3.0V to 3.6V, T
A
= 0°C to +70°C for DS2174Q; V
DD
= 3.0V to 3.6V, T
A
= -40°C to +85°C
for DS2174QN)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
CS Setup Time Before RD¯
t
SU(1)
5.0 ns
A(3:0) Setup Time Before RD¯
t
SU(2)
10.0 ns
A(3:0) Hold Time After RD
t
H(1)
10.0 ns
RD Pulse Width t
PW
38 ns
DATA Output Delay After RD¯
t
OD
8.0 ns 1
DATA Float Time After RD
t
F
2.0 ns 1
CS Hold Time After RD
t
H(3)
5.0 ns
= Rising Edge
¯ = Falling Edge
NOTES:
1) 50pF load.
VALID DATA
t
OD
A[3:0]
CS
RD
D[7:0]
DATA OUT
t
SU(1)
t
SU(2)
t
PW
t
H(1)
t
H(3)
t
F
DS2174
21 of 24
Figure 6-2. Write Timing
Table 6-B. PARALLEL PORT WRITE TIMING
(V
DD
= 3.0V to 3.6V, T
A
= 0°C to +70°C for DS2174Q; V
DD
= 3.0V to 3.6V, T
A
= -40°C to +85
°
C
for DS2174QN)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
CS Setup Time Before WR¯
t
SU(1)
5.0 ns
A(3:0) Setup Time Before WR¯
t
SU(2)
10.0 ns
A(3:0) Hold Time After WR
t
H(1)
10.0 ns
WR Pulse Width t
PW
38 ns
DATA Setup Time Before WR
t
SU(3)
10.0 ns
DATA Hold Time After WR
t
H(2)
5.0 ns
CS Hold Time After WR
t
H(3)
5.0 ns
VALID DATA
t
SU(3)
A[3:0]
CS
WR
D[7:0]
DATA IN
t
SU(1)
t
SU(2)
t
PW
t
H(1)
t
H(3)
t
H(2)

DS2174QN+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Telecom ICs Enhanced Bit Error Rate Tester (BERT)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet