LPC2377_78 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6.1 — 16 October 2013 37 of 69
NXP Semiconductors
LPC2377/78
Single-chip 16-bit/32-bit microcontrollers
7.27.1 EmbeddedICE
The EmbeddedICE logic provides on-chip debug support. The debugging of the target
system requires a host computer running the debugger software and an EmbeddedICE
protocol convertor. The EmbeddedICE protocol convertor converts the Remote Debug
Protocol commands to the JTAG data needed to access the ARM7TDMI-S core present
on the target system.
The ARM core has a Debug Communication Channel (DCC) function built-in. The DCC
allows a program running on the target to communicate with the host debugger or another
separate host without stopping the program flow or even entering the debug state. The
DCC is accessed as a coprocessor 14 by the program running on the ARM7TDMI-S core.
The DCC allows the JTAG port to be used for sending and receiving data without affecting
the normal program flow. The DCC data and control registers are mapped in to addresses
in the EmbeddedICE logic.
The JTAG clock (TCK) must be slower than
1
6
of the CPU clock (CCLK) for the JTAG
interface to operate.
7.27.2 Embedded trace
Since the LPC2377/78 has significant amounts of on-chip memories, it is not possible to
determine how the processor core is operating simply by observing the external pins. The
ETM provides real-time trace capability for deeply embedded processor cores. It outputs
information about processor execution to a trace port. A software debugger allows
configuration of the ETM using a JTAG interface and displays the trace information that
has been captured.
The ETM is connected directly to the ARM core and not to the main AMBA system bus. It
compresses the trace information and exports it through a narrow trace port. An external
Trace Port Analyzer captures the trace information under software debugger control. The
trace port can broadcast the Instruction trace information. Instruction trace (or PC trace)
shows the flow of execution of the processor and provides a list of all the instructions that
were executed. Instruction trace is significantly compressed by only broadcasting branch
addresses as well as a set of status signals that indicate the pipeline status on a cycle by
cycle basis. Trace information generation can be controlled by selecting the trigger
resource. Trigger resources include address comparators, counters and sequencers.
Since trace information is compressed the software debugger requires a static image of
the code being executed. Self-modifying code can not be traced because of this
restriction.
7.27.3 RealMonitor
RealMonitor is a configurable software module, developed by ARM Inc., which enables
real-time debug. It is a lightweight debug monitor that runs in the background while users
debug their foreground application. It communicates with the host using the DCC, which is
present in the EmbeddedICE logic. The LPC2377/78 contain a specific configuration of
RealMonitor software programmed into the on-chip ROM memory.
LPC2377_78 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6.1 — 16 October 2013 38 of 69
NXP Semiconductors
LPC2377/78
Single-chip 16-bit/32-bit microcontrollers
8. Limiting values
[1] The following applies to the limiting values:
a) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated
maximum.
b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V
SS
unless
otherwise noted.
[2] Including voltage on outputs in 3-state mode.
[3] Not to exceed 4.6 V.
[4] The peak current is limited to 25 times the corresponding maximum current.
[5] The maximum non-operating storage temperature is different than the temperature for required shelf life which should be determined
based on required shelf lifetime. Please refer to the JEDEC specification (J-STD-033B.1) for further details.
[6] Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor.
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
Symbol Parameter Conditions Min Max Unit
V
DD(3V3)
supply voltage (3.3 V) core and external
rail
3.0 3.6 V
V
DD(DCDC)(3V3)
DC-to-DC converter supply voltage
(3.3 V)
3.0 3.6 V
V
DDA
analog 3.3 V pad supply voltage 0.5 +4.6 V
V
i(VBAT)
input voltage on pin VBAT for the RTC 0.5 +4.6 V
V
i(VREF)
input voltage on pin VREF 0.5 +4.6 V
V
IA
analog input voltage on ADC related
pins
0.5 +5.1 V
V
I
input voltage 5 V tolerant I/O
pins; only valid
when the V
DD(3V3)
supply voltage is
present
[2]
0.5 +6.0 V
other I/O pins
[2][3]
0.5 V
DD(3V3)
+ 0.5 V
I
DD
supply current per supply pin
[4]
-100mA
I
SS
ground current per ground pin
[4]
-100mA
T
stg
storage temperature non-operating
[5]
65 +150 C
P
tot(pack)
total power dissipation (per package) based on package
heat transfer, not
device power
consumption
-1.5W
V
ESD
electrostatic discharge voltage human body
model; all pins
[6]
2500 +2500 V
LPC2377_78 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6.1 — 16 October 2013 39 of 69
NXP Semiconductors
LPC2377/78
Single-chip 16-bit/32-bit microcontrollers
9. Thermal characteristics
The average chip junction temperature, T
j
(C), can be calculated using the following
equation:
(1)
T
amb
= ambient temperature (C)
R
th(j-a)
= the package junction-to-ambient thermal resistance (C/W)
P
D
= sum of internal and I/O power dissipation
The internal power dissipation is the product of I
DD
and V
DD
. The I/O power dissipation of
the I/O pins is often small and many times can be negligible. However it can be significant
in some applications.
T
j
T
amb
P
D
R
th j a
+=
Table 5. Thermal characteristics
V
DD
= 3.0 V to 3.6 V; T
amb
=
40
C to +85
C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
T
j(max)
maximum junction
temperature
--125 C
Table 6. Thermal resistance value (C/W): ±15 %
V
DD
= 3.0 V to 3.6 V; T
amb
=
40
C to +85
C unless otherwise specified
LQFP144
ja
JEDEC (4.5 in 4 in)
0 m/s 31.5
1 m/s 28.1
2.5 m/s 26.2
Single-layer (4.5 in 3 in)
0 m/s 43.2
1 m/s 35.7
2.5 m/s 32.8
jc 7.8
jb 13.8

LPC2378FBD144,551

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
ARM Microcontrollers - MCU ARM7 512KF/USB/ENET
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet