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CS5461A-ISZR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P44
CS5461A
16 DS661F3
INT pin will become active if the DRDY bit is unmasked
in the Mask Register. When these bits are set, they
must be cleared (logic 0) by the user before they can be
asserted again.
If the Cycle Count Register (N) is set to 1, all output cal-
culations are instantaneous, and DRDY, like CRDY, will
indicate when instantaneous measurements are fin-
ished. Some calculations are inhibited when the cycle
count is less than 2.
5.4 Energy Pulse Output
The CS5461A provides three output pins for energy reg-
istration. The E1
and E2 pins provide a simple interface
which energy can be registered. These pins are de-
signed to directly connect to a stepper motor or electro-
mechanical counter. E1
and E2 pins can be set to one
of four pulse output formats, Normal, Alternate, Stepper
Motor, or Mechanical Counter. Table 2 defines the
pulse output format, which is controlled by bits ALT in
the Configuration Register, and MECH and STEP in the
Control Register.
The E3
pin is designated for system calibration, the
pulse rate can be selected to reach a frequency of
512 kHz.
The pulse output frequency of E1
and E2 is directly pro-
portional to the active power calculated from the input
signals. To calculate the output frequency on E1
and
E2
, the following transfer function can be utilized:
With MCLK = 4.096 MHz, PF = 1, and default settings,
the pulses will have an average frequency equal to the
frequency setting in the PulseRateE
1,2
Register when
the input signals applied to the voltage and current
channels cause full-scale readings in the instantaneous
voltage and current registers. When MCLK/K is not
equal to 4.096 MHz, the user should scale the
PulseRateE
1,2
Register by a factor of
4.096 MHz/(MCLK/K) to get the actual pulse rate out-
put.
5.4.1 Normal Format
The Normal format is the default. Figure 3 illustrates the
output format on pins E1
and E2. The E1 pin outputs ac-
tive-low pulses with a frequency proportional to the ac-
tive power. The E2
pin is the energy direction indicator.
Positive energy is represented by a pulse on the E1
pin
while the E2
pin remains high. Negative energy is rep-
resented by synchronous pulses on both the E1
pin and
the E2
pin.
The PulseRateE
1,2
Register defines the average fre-
quency on output pin E1
, when full-scale input signals
are applied to the voltage and current channels. The
maximum pulse frequency from the E1
pin
ALT STEP MECH FORMAT
000 Normal
0 X 1 Mechanical Counter
0 1 0 Stepper Motor
1 X 1 Alternate Pulse
Table 2. E1 and E2 Pulse Output Format
FREQ
E
= Average frequency of E1 and E2 pulses [Hz]
VIN = rms voltage across VIN+ and VIN- [V]
VGAIN = Voltage channel gain
IIN = rms voltage across IIN+ and IIN- [V]
IGAIN = Current channel gain
PF = Power Factor
PulseRateE
1,2
= Maximum frequency on E1
and E2 [Hz]
VREFIN = Voltage at VREFIN pin [V]
FREQ
E
VIN VGAIN IIN IGAIN PF PulseRateE
12,
VREFIN
2
------------------------------------------------------------------------------------------------------------------------------------------------=
E1
Positive Energy Burst Negative Energy Burst
. . .
. . .
. . .
. . .
E2
t
dur
Figure 3. Normal Format on pulse outputs E1 and E2
CS5461A
DS661F3 17
is (MCLK/K)/16. The pulse duration (t
dur
) is an integer
multiple of MCLK cycles, approximately equal to:
The maximum pulse duration (t
dur
) is determined by the
sampling rate and the minimum is defined by the maxi-
mum pulse frequency. The t
dur
limits are:
The Pulse Width Register (PW) does not affect the nor-
mal format.
5.4.2 Alternate Pulse Format
Setting bits MECH = 1 and STEP = 0 in the Control
Register and ALT = 1 in the Configuration Register con-
figures the E1
and E2 pins for alternating pulse format
output (see Figure 4). Each pin produces alternating ac-
tive-low pulses with a pulse duration (t
PW
) defined by
the Pulse Width Register (PW):
If MCLK = 4.096 MHz, K = 1, and PW = 1 then
t
PW
= 0.25 ms. To ensure that pulses occur on the E1
and E2 output pins when full-scale input signals are ap-
plied to the voltage and current channels, then:
The pulse frequency (FREQ
E
) is determined by the
PulseRateE
1,2
Register and can be calculated using the
transfer function. The energy direction is not defined in
the alternate pulse format.
5.4.3 Mechanical Counter Format
Setting bits MECH = 1 and STEP = 0 in the Control
Register and bit ALT = 0 in the Configuration Register
enables E1
and E2 for mechanical counters and similar
discrete counting instruments. When energy is nega-
tive, pulses appear on E2
(see Figure 5). When energy
is positive, the pulses appear on E1
. The pulse width is
defined by the Pulsewidth Register and will limit the out-
put pulse frequency (FREQ
E
). By default, PW = 512
samples, if MCLK = 4.096 MHz and K = 1 then
t
PW
= 128 ms. To ensure that pulses will occur, the
PulseRateE
1,2
Register must be set to an appropriate
value.
5.4.4 Stepper Motor Format
Setting bits STEP = 1 and MECH = 0 in the Control
Register and bit ALT = 0 in the Configuration Register
configures the E1
and E2 pins for stepper motor format.
When the accumulated active power equals the defined
t
dur
sec
1
PulseRateE
12,
8
--------------------------------------------
1
(MCLK/K)/16 8
-----------------------------------
t
dur
sec
1
(MCLK/K)/1024 8
---------------------------------------- -

Figure 4. Alternate Pulse Format on E1 and E2
E1
...
...
E2
......
...
t
PW
FREQ
E
t
PW
ms
PW
(MCLK/K)/1024
-----------------------------------------
=
PulseRateE
12,
1
t
PW
------------
t
PW
E1
Positive Energy
Negative Energy
...
...
...
...
E2
FREQ
E
Figure 5. Mechanical Counter Format on E1 and E2
CS5461A
18 DS661F3
energy level, the energy output pins (E1 and E2) alter-
nate changing states (see Figure 6). The duration
(t
edge
) between the alternating states is defined by the
transfer function:
The direction the motor will rotate is determined by the
order of the state changes. When energy is positive, E1
will lead E2. When energy is negative, E2 will lead E1.
The Pulse Width Register (PW) does not affect the step-
per motor format.
5.4.5 Pulse Output E3
The pulse output E3
is designed to assist with meter cal-
ibration. The pulse-output frequency of E3
is directly
proportional to the active power calculated from the in-
put signals. E3
pulse frequency is derived using a sim-
ular transfer function as E1
, but is set by the value in the
PulseRateE
3
Register.
The E3
pin outputs negative and positive energy, but
has no energy direction indicator.
The pulse width of E3
is configurable. The PulseWidth
register defines the pulse width of E3
in units of 1/OWR
or:
The default value is 0.
5.4.6 Anti-creep for the Pulse Outputs
Anti-creep allows the measurement element to maintain
an energy level, such that when the magnitude of the
accumulated active power is below this level, no energy
pulses are output. Anti-creep is enabled by setting bit
FAC in the Control Register for E3
and bit EAC in the
Control Register for E1
and E2.
For low-frequency pulse output formats (i.e. mechanical
counter and stepper motor formats), the active power is
accumulated over time. When a designated energy lev-
el is reached (determined by the transfer function) a
pulse is generated on E1
and/or E2. If active power with
alternating polarity occurs during the accumulation peri-
od (e.g. random noise at zero power levels), the accura-
cy of the registered energy will be maintained.
For high-frequency pulse output formats (i.e. normal
and alternate pulse formats), the active power is accu-
mulated over time until a 8x buffer is defined. Then,
when the designated energy level is reached, a pulse is
generated on E1
and/or E2. For pulse outputs with high
frequencies and power levels close to zero, the extend-
ed buffer prevents random noise from being registered
as active energy.
5.4.7 Design Examples
EXAMPLE #1:
The maximum rated levels for a power line meter are
250 V rms and 20 A rms. The required number of puls-
es per second on E1
is 100 pulses per second (100 Hz),
when the levels on the power line are 220 V rms and
15 A rms.
With a 10x gain on the voltage and current channel the
maximum input signal is 250 mV
P
(see Section 5.1 An-
alog Inputs on page 15). To prevent over-driving the
channel inputs, the maximum rated rms input levels will
register 0.6 in V
RMS
and I
RMS
by design. Therefore the
voltage level at the channel inputs will be 150 mV rms
when the maximum rated levels on the power lines are
250 V rms and 20 A rms.
Solving for PulseRateE
1,2
using the transfer function:
Therefore with PF = 1 and
the PulseRateE
1,2
Register is set to:
E1
E2
Positive Energy Negative Energy
...
...
...
...
t
edge
Figure 6. Stepper Motor Format on E1 and E2
t
edge
sec
1
FREQ
E
----------------------
=
t
pw
PulseWidth
MCLK
K1024
---------------------------------------------
=
PulseRateE
12,
FREQ
E
VREFIN
2
VIN VGAIN IIN PF
------------------------------------------------------------------ -
=
VIN 220V 150mV250V 132mV==
IIN 15A 150mV20A 112.5mV==
PulseRateE
100 2.5
2
0.132 10 0.1125 10
-----------------------------------------------------------------
420.8754Hz==
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P44

CS5461A-ISZR

Mfr. #:
Buy CS5461A-ISZR
Manufacturer:
Cirrus Logic
Description:
Current & Power Monitors & Regulators IC Sngl-Phs BiDirect PWR/Energy
Lifecycle:
New from this manufacturer.
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