SC16C652B_4 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 04 — 1 September 2005 14 of 43
Philips Semiconductors
SC16C652B
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
6.11 Sleep mode
Sleep mode is an enhanced feature of the SC16C652B UART. It is enabled when EFR[4],
the enhanced functions bit, is set and when IER[4] of both channels are set. Sleep mode
is entered when:
• Modem input pins are not toggling.
• The serial data input line, RX, is idle (logic HIGH).
• The TX FIFO and TX shift register are empty.
• There are no interrupts pending.
Remark: Sleep mode will not be entered if there is data in the RX FIFO.
In Sleep mode, the UART clock and baud rate clock are stopped. Since most registers are
clocked using these clocks, the power consumption is greatly reduced.
Remark: Writing to the divisor latches, DLL and DLH, to set the baud clock, must not be
done during Sleep mode. Therefore, it is advisable to disable Sleep mode using IER[4]
before writing to DLL or DLH.
SC16C652B resumes normal operation by any of the following:
• Receives a start bit on RXA/RXB pin.
• Data is loaded into transmit FIFO.
• A change of state on any of the modem input pins
If the device is awakened by one of the conditions described above, it will return to the
Sleep mode automatically after the last character is transmitted or read by the user. The
device will stay in Sleep mode until it is disabled by setting any channel’s IER bit 4 to a
logic 0.
