LTC4121/LTC4121-4.2
5
4121fc
For more information www.linear.com/LTC4121
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
RUN
V
EN
Enable Threshold V
RUN
Rising
l
2.35 2.45 2.55 V
Hysteresis V
RUN
Falling 200 mV
Run Pin Input Current V
RUN
= 40V 0.01 0.1 µA
V
SD
Shutdown Threshold V
RUN
Falling
l
0.4 1.2 V
Hysteresis 220 mV
FREQ
FREQ Pin Input Low
l
0.4 V
FREQ Pin Input High
l
3.6 V
FREQ Pin Input Current 0 < V
FREQ
< V
INTVCC
±1 µA
MPPT
I
MPPT
MPPT Pin Leakage Current V
MPPT
= 4.2V
l
15 1000 nA
T
MP
MPPT Sample Period Period Between Charger Disabled Events 28 s
PW
MP
MPPT Sample Pulse Width Charger Disabled Pulse Width 36 ms
K
F
Internal Divider Gain Internal DAC Voltage as a Ratio to V
IN
0.098 0.1 0.102 V/V
V
MP(OS)
MPPT Error Amp Gain Offset V
MPPT
– V
DAC
, I
BAT
= 50%• I
CHG
10 –45 –100 mV
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= V
RUN
= 15V, V
CHGSNS
= V
BAT
= 4V, R
PROG
= 3.01k,
V
FB
= 2.29V (LTC4121), V
BATSNS
= 4V (LTC4121-4.2). Current into a pin is positive out of a pin is negative. (Note 2)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4121 is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTC4121E is guaranteed to meet performance specifications
for junction temperatures from 0°C to 85°C. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC4121I is guaranteed over the full –40°C to 125°
C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance, and other environmental factors.
Note 3: If a battery voltage greater than 11V can be hot plugged to the
LTC4121 a reverse blocking diode is required in series with the BAT pin to
prevent large inrush current into the low impedance BAT pin.
Note 4: Standby mode occurs when the LTC4121/LTC4121-4.2 stops
switching due to an NTC fault, MPPT pause, or when the charge current
has dropped low enough to enter Burst Mode operation. Disabled mode
occurs when V
RUN
is between V
SD
and V
EN
. Shutdown mode occurs
when V
RUN
is below V
SD
or when the differential undervoltage lockout
is engaged. Sleep mode occurs after a timeout while the battery voltage
remains above the V
RCHG
or V
RCHG_42
threshold.
Note 5: The internal supply INTV
CC
should only be used for the NTC
divider, it should not be used for any other loads
Note 6: For the LTC4121, the FB pin is measured with a resistance of 588k
in series with the pin.
Note 7: h
C/10
is expressed as a fraction of measured full charge current as
measured at the PROG pin voltage when the CHRG pin de-asserts.
Note 8: In an application circuit with an inductor connected from SW to
CHGSNS, the total battery leakage current when disabled is the sum of
I
BATSNS
and I
SW
(LTC4121-4.2) or I
BAT
and I
FBG_LEAK
and I
SW
(LTC4121).
Note 9: When no supply is present at IN, the SW powers IN through the
body diode of the top side switch
. This may cause additional SW pin
current depending on the load present at IN.
Note 10: Guaranteed by design and/or correlation to static test.
