LTC4121/LTC4121-4.2
7
4121fc
For more information www.linear.com/LTC4121
TYPICAL PERFORMANCE CHARACTERISTICS
Typical Burst Mode Waveforms
IN Pin Shutdown Current
vs Input Voltage
Burst Mode Trigger Current
Typical Battery Charge Current
vs Temperature
Typical Solar Charging Cycle
Efficiency vs I
BAT
I
BAT
(mA)
0
40
EFFICIENCY (%)
70
60
50
100
80
90
100
4121 G10
200 300 400
V
IN
= 9V
V
IN
= 14V
V
IN
= 19V
V
IN
= 24V
LTC4121-42
V
BAT
= 4.2V
FREQ = LOW
L
SW
= SLF12575T-470M2R7
TEMPERATURE (°C)
–40
0
I
CHG
(mA)
150
100
250
200
50
450
350
300
400
–25
4121 G11
–10 5 20 35 50 65 80 95 110 125
V
IN
= 15V
V
BAT
= 3.8V
R
PROG
= 3.01k
R
PROG
= 6.04k
R
PROG
= 12.1k
R
PROG
= 24.3k
TIME (HR)
0
0
BATTERY CURRENT (mA)
V
BAT
, V
CHRG
(V)
150
100
250
200
50
450
350
300
400
0
1.5
1.0
2.5
2.0
0.5
4.5
3.5
3.0
4.0
0.5
4121 G12
1 1.5 2 2.5 3 3.5
BAT = 500mAHr
L
SW
= TDK SLF7045
47µH
R
FB1
= 732k,
R
FB2
= 976k
R
PROG
= 3.01k
V
CHRG
I
BAT
V
BAT
V
IN
(V)
5
0
I
IN
(µA)
30
20
50
40
10
80
70
60
10
4121 G15
15 20 25 30 35 40
SHUTDOWN 130°C
SHUTDOWN 25°C
SHUTDOWN –45°C
IN Pin Disabled Current
vs Input Voltage
V
IN
(V)
5
0
I
IN
(µA)
30
20
50
40
10
80
70
60
10
4121 G16
15 20 25 30 35 40
DISABLED 130°C
DISABLED 25°C
DISABLED –45°C
V
IN
(V)
5
0
I
BAT
(mA)
30
20
50
40
10
100
70
60
90
80
10
4121 G13
15 20 25 30 35 40
R
PROG
= 3.01kΩ
R
PROG
= 6.04kΩ
V
SW
5V/DIV
V
PROG
200mV/DIV
I
SW
200mA/DIV
4121 G14
4µs/DIV
V
IN
= 15V
V
BAT
= 4.2V
I
BAT
= 38mA
FREQ = GND
T
A
= 25°C, unless otherwise noted.
LTC4121/LTC4121-4.2
8
4121fc
For more information www.linear.com/LTC4121
PIN FUNCTIONS
INTV
CC
(Pin 1): Internal Low Drop Out (LDO) Regulator
Output Pin. This pin is the output of an internal linear
regulator that generates the internal INTV
CC
supply from
IN. It also supplies power to the switch gate drivers and
the low battery linear charge current I
LOWBAT
. Connect
a 2.2µF low ESR capacitor from INTV
CC
to GND. Do not
place any external load on INTV
CC
other than the NTC bias
network. Overloading this pin can disrupt internal operation.
When the RUN pin is above V
EN
, and INTV
CC
rises above
the UVLO threshold and IN rises above BAT by ∆V
DUVLO
and its hysteresis, the charger is enabled.
BOOST (Pin 2): Boosted Supply Pin. Connect a 22nF boost
capacitor from this pin to the SW pin.
IN (Pin 3): Positive Input Power Supply. Decouple to GND
with a 10µF or larger low ESR capacitor. The input supply
impedance and the input decoupling capacitor form an RC
network that must settle during the MPPT sample pulse
width of about 36ms. This allows the LTC4121 to sample
the open-circuit voltage.
SW (Pin 4): Switch Pin. The SW pin delivers power from
IN to BAT via the step-down switching regulator. An in-
ductor should be connected from SW to CHGSNS. See
the Applications Information section for a discussion of
inductor selection.
GND (Pin 5, Exposed Pad Pin 17): Ground Pin. Connect to
Exposed Pad. The Exposed Pad must be soldered to PCB
GND to provide a low electrical and thermal impedance
connection to ground.
MPPT (Pin 6): Maximum Power Point Tracking Pin
. This
pin is used to program an input voltage regulation loop.
Connect an external resistive divider from V
IN
to MPPT to
GND. This divider programs the maximum power point
voltage as percentage of the input open-circuit voltage.
For more information on programming the MPPT resis-
tive divider refer to the Application Information section. If
the input voltage regulation feature is not used, connect
MPPT to either INTV
CC
or IN with a minimum 10k resistor.
Keep parasitic capacitance at the MPPT pin to a minimum
as capacitance at this pin forms a pole that may interfere
with switching regulator stability.
FREQ (Pin 7): Step-Down Regulator Switching Frequency
Select Input Pin. Connect to INTV
CC
to select a 1.5MHz
switching frequency or GND to select a 750kHz switching
frequency. Do not float.
CHGSNS (Pin 8): Battery Charge Current Sense Pin. An
internal current sense resistor between CHGSNS and BAT
pins monitors battery charge current. An inductor should
be connected from SW to CHGSNS.
IN Pin Switching Current
vs Input Voltage
IN Pin Sleep Current
vs Input Voltage
IN Pin Standby Current
vs Input Voltage
V
IN
(V)
5
0
I
IN(SWITCHING)
(mA)
2
4
3
1
7
6
5
10
4121 G17
15 20 25 30 35 40
FREQ = INTV
CC
I
BAT
= 0
FREQ = GND
130°C
25°C
–45°C
V
IN
(V)
5
0
I
IIN
(µA)
40
20
80
60
140
120
100
10
4121 G18
15 20 25 30 35 40
SLEEP 130°C
SLEEP 25°C
SLEEP –45°C
V
IN
(V)
5
80
I
IIN
(µA)
100
90
120
110
180
170
130
150
140
160
10
4121 G19
15 20 25 30 35 40
STANDBY FREQ HIGH 25°C
STANDBY FREQ LOW 25°C
TYPICAL PERFORMANCE CHARACTERISTICS
T
A
= 25°C, unless otherwise noted.
LTC4121/LTC4121-4.2
9
4121fc
For more information www.linear.com/LTC4121
PIN FUNCTIONS
BAT (Pin 9): Battery Output Pin. Battery charge current
is delivered from this pin through the internal charge
current sense resistor. In low battery conditions a small
linear charge current, I
LOWBAT
, is sourced from this pin
to precondition the battery. Decouple the BAT pin with a
low ESR 22µF ceramic capacitor to GND.
BATSNS (Pin 10, LTC4121-4.2 Only): Battery Voltage
Sense Pin. For proper operation, this pin must always be
connected physically close to the positive battery terminal.
FB (Pin 10, LTC4121 Only): Battery Voltage Feedback
Reference Pin. The charge function operates to achieve a
final float voltage of 2.4V at this pin. Battery float voltage
is programmed using a resistive divider from BAT to FB
to FBG, and can be programmed from 3.5V up to 18V.
The feedback pin input bias current, I
FB
, is 25nA. Using a
resistive divider with a Thevenin equivalent resistance of
588k compensates for input bias current error.
FBG (Pin 11, LTC4121 Only): Feedback Ground Pin. This
pin disconnects the external FB divider load from the battery
when it is not needed. When sensing the battery voltage
this pin presents a low resistance, R
FBG
, to GND. When in
disabled or shutdown modes this pin is high impedance.
NTC (Pin 12): Input to the Negative Temperature Coefficient
Thermistor Monitoring Circuit. The NTC pin connects to
a negative temperature coefficient thermistor which is
typically co-packaged with the battery to determine if the
battery is too hot or too cold to charge. If the battery’s
temperature is out of range, the LTC4121 enters STANDBY
mode and charging is paused until the battery tempera-
ture re-enters the valid range. A low drift bias resistor is
required from INTV
CC
to NTC and a thermistor is required
from NTC to GND. Tie the NTC pin to GND, and omit the
NTC resistive divider to disable NTC qualified charging if
NTC functionality is not required.
PROG (Pin 13): Charge Current Program and Charge
Current Monitor Pin. Connect a 1% resistor between
3.01k (400mA) and 24.3k (50mA) from PROG to ground
to program the charge current. While in constant-current
mode, this pin regulates to 1.227V. The voltage at this pin
represents the average charge current using the following
formula:
I
CHG
= h
PROG
PROG
R
PROG
where h
PROG
is typically 988. Keep parasitic capacitance
on the PROG pin to a minimum. If monitoring charge cur-
rent via the voltage at the PROG pin add a series resistor
of at least 2k to isolate stray capacitance from this node.
CHRG (Pin 14): Open-drain Charge Status Output Pin.
Typically pulled up through a resistor to a reference
voltage, the CHRG pin indicates the status of the battery
charger. The pin can be pulled up to voltages as high as
IN when disabled, and can sink currents up to 5mA when
enabled. When the battery is being charged, the CHRG
pin is pulled low. When the termination timer expires or
the charge current drops below 10% of the programmed
value, the CHRG pin is forced to a high impedance state.
FAULT (Pin 15): Open-drain Fault Status Output Pin. Typi-
cally pulled up through a resistor to a reference voltage,
this status pin indicates fault conditions during a charge
cycle. The pin can be pulled up to voltages as high as IN
when disabled, and can sink currents up to 5mA when
enabled. An NTC temperature fault causes this pin to be
pulled low. A bad battery fault also causes this pin to
be pulled low. If no fault conditions exist, the FAULT pin
remains high impedance.
RUN (Pin 16): Run Pin. When RUN is pulled below V
EN
and its hysteresis, the device is disabled. In disabled
mode, battery charge current is zero and the CHRG and
FAULT pins assume high impedance states. If the voltage
at RUN is pulled below V
SD
, the device is in SHUTDOWN
mode. When the voltage at the RUN pin rises above V
EN
,
the INTV
CC
LDO turns on. When the INTV
CC
LDO rises
above its UVLO threshold the charger is enabled. The
RUN pin should be tied to a resistive divider from V
IN
to
program the input voltage at which charging is enabled.
Do not float the RUN pin.

LTC4121EUD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management 40V 400mA Sync Buck Bat Chr
Lifecycle:
New from this manufacturer.
Delivery:
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