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TJA1082TT,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P38
TJA1082 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 28 November 2012 13 of 38
NXP Semiconductors
TJA1082
FlexRay node transceiver
6.4 Bus error detection
The TJA1082 detects the following bus errors during transmission:
• Short-circuit BP to BM at the ECU connector or on the bus
• Short-circuit BP to GND at the ECU connector or on the bus
• Short-circuit BM to GND at the ECU connector or on the bus
• Short-circuit BP to V
CC
at the ECU connector or on the bus
• Short-circuit BM to V
CC
at the ECU connector or on the bus
The bus error flag is not set when a wake-up pattern or a FlexRay Collision Avoidance
Symbol (CAS) is being transmitted or received.
6.5 Fail silent behavior
Three mechanisms guarantee the ‘fail silent’ behavior of the TJA1082:
• The TXEN Clamped flag is set if pin TXEN goes LOW for longer than t
detCL(TXEN)
in
Normal mode; the transmitter is disabled.
• The BGE Clamped flag is set if pin BGE goes HIGH for longer than t
detCL(BGE)
in
Normal mode; no action is taken.
• If a loss-of-ground occurs at the transceiver, resulting in the TJA1082 switching to
Power-off mode, no current flows out of the digital input pins (TXD, TXEN, BGE,
STBN, SCLK, SCSN); see Table 3
for details of the behavior of the bus pins.
6.6 TJA1082 flags
The TJA1082 has 11 status/error flags. These are described in Table 7.
The duration of each interruption is 130 ns.
The transition time from DATA_0 to DATA_1 and vice versa is about 20 ns.
The TJA1082 wake-up flag is set on receipt of the following frame payload:
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
Fig 10. Minimum bus pattern for bus wake-up via dedicated FlexRay data frame
015aaa097
V
dif
0 V
−1500
wake-up
+1500
870
ns
870
ns
870 ns 870 ns
770
ns
130 ns
130
ns
130
ns
5 μs
5 μs 5 μs 5 μs
TJA1082 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 28 November 2012 14 of 38
NXP Semiconductors
TJA1082
FlexRay node transceiver
[1] All flags, with the exception of the PWON flag, are reset after a power-on reset.
[2] If an undervoltage has not been detected on pin V
CC
.
[3] If STBN = LOW.
[4] If BGE = HIGH, the Normal mode flag is set, the TEMP HIGH flag is not set and the TXEN clamped flag is not set.
[5] Flag can only be set or reset in Normal mode or on leaving Normal mode.
[6] If STBN = HIGH.
[7] If STBN = HIGH in SPI mode
[8] The SPI error flag is set when:
a) more than 16 falling edges occur on pin SCLK while pin SCSN = LOW
b) less than 16 falling edges occur on pin SCLK while pin SCSN = LOW.
6.7 TJA1082 status register
The TJA1082 contains a 16-bit status register, of which bits S0 to S4 reflect the state of
the status flags, bits S5 to S10 reflect the state of the error flags and bit S15 is a parity bit.
All flags can be individually read out on pin SDO via a 16-bit SPI interface when the
transceiver is configured in SPI mode. The status register bits are described in Table 8
.
Table 7. TJA1082 flags and set/reset conditions
Flag name Flag type Flag description Set condition Reset condition
[1]
Consequence of
flag set
bus wake status
flag
indicates if a wake-up
event has occurred
wake-up event on bus
in Standby mode
[2]
transition to Normal
mode
RXD LOW;
ERRN LOW
[3]
Normal
mode
status
flag
indicates if the transceiver
is in Normal mode
entering Normal mode leaving Normal mode -
transmitter
enabled
status
flag
indicates the transmitter
status
transmitter enabled
[4]
transmitter disabled -
BGE
clamped
status
flag
indicates if pin BGE is
clamped
BGE HIGH for longer
than t
detCL(BGE)
[5]
BGE LOW
[5]
-
PWON status
flag
indicates when the digital
section is initialized
V
CC
> V
th(rec)POR
transition to Normal
mode
-
bus error error flag indicates if a bus error has
been detected
bus error detected
[5]
no bus error detected or
positive edge on
TXEN
[5]
ERRN LOW
[6]
TEMP
HIGH
error flag indicates if the max.
junction temperature has
been reached
T
vj
> T
j(dis)(high)
[5]
TXEN = HIGH while
T
vj
< T
j(dis)(high)
[5]
ERRN LOW
[6]
;
transmitter disabled
TXEN
clamped
error flag indicates if pin TXEN is
clamped
TXEN LOW for longer
than t
detCL(TXEN)
[5]
TXEN = HIGH
[5]
ERRN LOW
[6]
;
transmitter disabled
UVV
CC
error flag indicates if there is an
undervoltage at pin V
CC
V
CC
< V
uvd(VCC)
for
longer than t
det(uv)(VCC)
V
CC
> V
uvr(VCC)
for
longer than t
rec(uv)(VCC)
ERRN LOW
[6]
;
entering Standby
mode
UVV
IO
error flag indicates if there is an
undervoltage at pin V
IO
V
IO
< V
uvd(VIO)
for
longer than t
det(uv)(VIO)
V
IO
> V
uvr(VIO)
for longer
than t
rec(uv)(VIO)
ERRN LOW
[6]
;
entering Standby
mode
SPI error error flag indicates if an SPI error
has occurred
SPI error detected
[8]
falling edge on SCSN ERRN LOW
[7]
;
SDO goes to a high
impedance state
TJA1082 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 28 November 2012 15 of 38
NXP Semiconductors
TJA1082
FlexRay node transceiver
[1] Also cleared during Power-off.
6.8 Error signalling
The TJA1082 provides two modes for error indication:
• SPI mode (default mode)
• Simple error indication mode
SPI mode is active on power-up.
To switch to simple error indication mode, SCSN has to be held LOW (connected to GND)
and SCLK held HIGH (connected to V
IO
) for longer than t
det(L)(SCLK)
(provided a V
IO
undervoltage has not occurred).
When the TJA1082 is in simple error indication mode, a rising edge on SCSN initiates a
transition to SPI mode (provided a V
IO
undervoltage has not occurred).
Table 8. TJA1082 status register
Status
bit
Flag name Set condition Reset condition
S0 bus wake bus wake flag set bus wake flag cleared
S1 Normal
mode
Normal mode flag set Normal mode flag cleared
S2 transmitter
enabled
transmitter enabled flag set transmitter enabled flag cleared
S3 BGE
clamped
BGE clamped flag set BGE clamped flag cleared
S4 PWON PWON flag set PWON flag cleared and successful readout
[1]
S5 bus error bus error flag set bus error flag cleared and successful
readout
[1]
S6 TEMP
HIGH
TEMP HIGH flag set TEMP HIGH flag cleared and successful
readout
[1]
S7 TXEN
clamped
TXEN clamped flag set TXEN clamped flag cleared and successful
readout
[1]
S8 UVV
CC
UVV
CC
flag set UVV
CC
flag cleared and successful readout
[1]
S9 UVV
IO
UVV
IO
flag set UVV
IO
flag cleared and successful readout
[1]
S10 SPI error SPI error flag set SPI error flag cleared and successful
readout
[1]
S11 reserved always LOW
S12 reserved always HIGH
S13 reserved always LOW
S14 reserved always HIGH
S15 parity bit odd parity of status bits even parity of status bits
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P38

TJA1082TT,118

Mfr. #:
Buy TJA1082TT,118
Manufacturer:
NXP Semiconductors
Description:
Interface - Specialized IC TXRX FLEXRAY
Lifecycle:
New from this manufacturer.
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