8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PLACE NEAR
I2C CONTROLLER
IF USED
Layout notes:
1. Separate Xout and Xin Traces by 3 x the trace width
2. Do not share crystal load capacitor ground via with
other components.
3. Route power from bead through bulk capacitor pad
then through 0.1uF capacitor pad then to clock chip
Vdd pad.
4. Do not share ground vias. One ground pin one ground
via.
LVDS TERMINATION
3.3V LVPECL TERMINATION
2.5V and 3.3V HCSL TERMINATION
LVCMOS TERMINATION
Manufacture Part Number Z@100MHz PkgSz DC res. Current(Ma)
Fair-Rite 2504021217Y0 120 0402 0.5 200
muRata BLM15AG221SN1 220 0402 0.35 300
muRata BLM15BB121SN1 120 0402 0.35 300
TDK MMZ1005S241A 240 0402 0.18 200
TECSTAR TB4532153121 120 0402 0.3 300
NOTE:FERRITE BEAD FB1,FB2 =
LP HCSL TERMINATION for
OUT3/3B,OUT5/5B,OUT6/6B, OUT7/7B
Revision history: 0.1 3/26/2015 first publication
The following pins have weak pull down resistors
11,12,10,17,34,40
NOTE:VCC
can be set
to 1.8V,2.5V
or 3.3V
FG_X2
V1P8VC
SDA
SCL
OUTR5
OUTRB5
SD/OE
OE_buffer
OEB3,5
OEB6,7 OUTR6
OUTRB6
OUTR7
OUTRB7
V1P8VC
V1P8VCA
SDA
SCL
FG_X1
V1P8VCA
OUT_0_SEL-I2C
V1P8VC
V1P8VCB
OUTR0
V1P8VCB
OUTR1
OUTRB1
V1P8VCB
OUTR2
OUTRB2
OUTR3
OUTRB3
V1P8VCB
OUTR4
OUTRB4
V1P8VCA
V1P8VCB
OUTR2
OUT_2
OUTR3
OUTRB3
OUT_0_SEL-I2C
V3P3
V1P8VCA
VCC
VCC1P8
V1P8VC
Size
Document Number Rev
Date: Sheet
of
0.1
Integrated Device Technology
A
11Thursday, March 26, 2015
5P49V5907A
San Jose, CA
Size
Document Number Rev
Date: Sheet
of
0.1
Integrated Device Technology
A
11Thursday, March 26, 2015
5P49V5907A
San Jose, CA
Size
Document Number Rev
Date: Sheet
of
0.1
Integrated Device Technology
A
11Thursday, March 26, 2015
5P49V5907A
San Jose, CA
C9
10uF
12
C7 NP
12
R15
33
1 2
R17 33
1 2
C3
.1uF
12
R16 33
1 2
C4
.1uF
12
U4
RECEIVER
1
2
C5
.1uF
12
R6 33
1 2
R18
10K
1 2
C2
1uF
12
FB1
SIGNAL_BEAD
1 2
GNDGND
Y1
25.000 MHz
CL = 8pF
4
1
2
3
U3
RECEIVER
1
2
C6
NP
12
C8
.1uF
12
R4
49.9
1%
1 2
U2
RECEIVER
1
2
R14 33
1 2
R5
49.9
1%
1 2
R2
2.2
1 2
R13 33
1 2
R8
10K
1 2
R10 50
1 2
R3 100
1 2
U7
RECEIVER
1
2
R12 50
1 2
R11 50
1 2
R7
10K
1 2
U5
5P49V5907A
XOUT
2
XIN/REF
3
NC
1
VDDO
5
OUT7
6
SEL1/SDA
11
SEL0/SCL
12
SD/OE
10
VDDA
4
VDD
13
VDDO0
39
OUT0_SEL_I2CB
40
VDDO1
33
OUT1
32
OUT1B
31
VDDO2
30
OUT2
29
OUT2B
28
VDD_CORE
25
OUT3
24
OUT3B
23
VDDO4
18
OUT4
19
OUT4B
20
EPAD
41
EPAD
42
EPAD
43
EPAD
44
EPAD
45
EPAD
46
EPAD
47
EPAD
48
EPAD
49
OEB3,5
17
OUT5B
16
OUT5
15
VDDO
14
OUT6B
9
OUT6
8
OUT7B
7
NC
21
NC
22
VDD
27
VDD
26
VDDO
36
NC
35
OEB6,7
34
VDD
37
OE_buffer
38
FB2
SIGNAL_BEAD
1 2
C11
.1uF
12
C1
10uF
12
C10
.1uF
12
