CY28378
......................Document #: 38-07519 Rev. ** Page 19 of 21
Layout Example
Switching Waveforms (continued)
t
8A
t
8B
CPU Clock Cycle-Cycle Jitter
Host_b
Host
t
9A
t
9B
Cycle-Cycle Clock Jitter
CLK
CY28378
......................Document #: 38-07519 Rev. ** Page 20 of 21
G
FB
+3.3V Supply
.005F
G G
VDDQ3
C3
48
47
46
45
44
43
42
41
40
38
37
36
35
34
3
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
39
G
V
G
V
G
V
G
V
G
V
G
V
G
V
G
G
5
VDDQ3
C5
C6
G
= VIA to GND plane layer
V =VIA to respective supply plane layer
Note: Each supply plane or strip should have a
ferrite bead and capacitors
Cermaic Caps C3 = 10 - 22
µF
C4 = .005
µF
FB = Dale ILB1206 - 300 (300 @ 100 MHz)
C5 = 10F
C6 = .1F
All bypass caps = .1f ceramic
* For use with onboard video using 48 MHz for Dot Clock or connect to VDDQ3
*
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
CY28378
CY28378
......................Document #: 38-07519 Rev. ** Page 21 of 21
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil-
icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, repre-
sentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
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cation, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Package Diagram
Ordering Information
Ordering Code Package Type Operating Range
CY28378OC 48-pin Small Shrunk Outline Package (SSOP) Commercial, 0°C to 70°C
CY28378OCT 48-pin Small Shrunk Outline Package (SSOP) –Tape and Reel Commercial, 0°C to 70°C
48-LeadShrunkSmallOutlinePackageO48

CY28378OXC

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Clock Generators & Support Products System Clock for Pentium 4 and Intel Brookdale, 845 Chipsets
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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