........................Document #: 38-07519 Rev. ** Page 5 of 21
The register associated with the SDI initializes to it’s default
setting upon power-up, and therefore use of this interface is
optional. Clock device register changes are normally made
upon system initialization, if any are required. The interface
can also be used during system operation for power
management functions.
Data Protocol
The clock driver serial protocol accepts byte write, byte read,
block write and block read operation from the controller. For
block write/read operation, the bytes must be accessed in
sequential order from lowest to highest byte (most significant
bit first) with the ability to stop after any complete byte has
been transferred. For byte write and byte read operations, the
system controller can access individual indexed bytes. The
offset of the indexed byte is encoded in the command code,
as described in Table 3.
The block write and block read protocol is outlined in Table 4
while Table 5 outlines the corresponding byte write and byte
read protocol.
The slave receiver address is 11010010 (D2h).
Table 3. Command Code Definition
Bit Descriptions
7
0 = Block read or block write operation
1 = Byte read or byte write operation
6:0
Byte offset for byte read or byte write operation. For block read or block write operations, these
bits should be ‘0000000’.
Table 4. Block Read and Block Write Protocol
Block Write Protocol Block Read Protocol
Bit Description Bit Description
1 Start 1 Start
2:8 Slave address – 7 bits 2:8 Slave address – 7 bits
9 Write = 0 9 Write = 0
10 Acknowledge from slave 10 Acknowledge from slave
11:18 Command Code – 8 Bit
'00000000' stands for block operation
11:18 Command Code – 8 Bit
'00000000' stands for block operation
19 Acknowledge from slave 19 Acknowledge from slave
20:27 Byte Count – 8 bits 20 Repeat start
28 Acknowledge from slave 21:27 Slave address – 7 bits
29:36 Data byte 1 – 8 bits 28 Read = 1
37 Acknowledge from slave 29 Acknowledge from slave
38:45 Data byte 2 – 8 bits 30:37 Byte count from slave – 8 bits
46 Acknowledge from slave 38 Acknowledge
.... ...................... 39:46 Data byte from slave – 8 bits
.... Data Byte (N–1) –8 bits 47 Acknowledge
.... Acknowledge from slave 48:55 Data byte from slave – 8 bits
.... Data Byte N –8 bits 56 Acknowledge
.... Acknowledge from slave .... Data bytes from slave/Acknowledge
.... Stop .... Data byte N from slave – 8 bits
.... Not Acknowledge
.... Stop
