Si4114G
16 Rev. 1.1
Table 6. Powerdown Configuration
PWDN Pin PDRB Reference
Frequency
Amplifier
RF
Circuitry
PWDN
= 0
xOFFOFF
PWDN
= 1
0OFFOFF
1ONON
Si4114G
Rev. 1.1 17
4. Control Registers
Note: Registers 1 and 5–15 are reserved. Writes to these registers may result in unpredictable behavior. Any register not listed
here is reserved and should not be written.
Table 7. Register Summary
Register Name Bit
17
Bit
16
Bit
15
Bit
14
Bit
13
Bit
12
Bit
11
Bit
10
Bit
9
Bit
8
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
0Main
Configuration
0000
AUXSEL
[1:0]
00000
RDIV
000010
1 Reserved
2 Powerdown 00000000000 0 0 0 0 0 0
PDRB
3 RF1 N Divider N
RF1
[17:0]
4 RF2 N Divider 0 N
RF2
[16:0]
5 Reserved
.
.
.
15 Reserved
Si4114G
18 Rev. 1.1
Register 0. Main Configuration Address Field = A[3:0] = 0000
Bit D17D16D15D14D13D12D11D10D9D8D7D6D5D4D3D2D1D0
Name 0000AUXSEL
[1:0]
00000
RDIV
000010
Bit Name Function
17:14 Reserved Program to zero.
13:12 AUXSEL[1:0] Auxiliary Output Pin Definition.
00 = Reserved.
01 = Force output low.
10 = Reserved.
11 = Lock Detect (LDETB).
11:7 Reserved Program to zero.
6 RDIV R Divider Selector.
0 = ÷65.
1 = ÷130.
5:2 Reserved Program to zero.
1 Reserved Program to one.
0 Reserved Program to zero.

SI4114G-B-GM

Mfr. #:
Manufacturer:
Silicon Labs
Description:
RF Wireless Misc GSM Frequency Synthesizer for Direct Conversion, lead free Not recommended for new designs, Recommended replacement is multiple Si41xx-D-GM devices
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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