22
COMMERCIAL TEMPERATURE RANGE
IDT72V3686/72V3696/72V36106 3.3V CMOS TRIPLE BUS SyncFIFO
TM
WITH BUS-MATCHING 16,384 x 36 x 2, 32,768 x 36 x 2, 65, 536 x 36
NOTE:
1. Written to FIFO1.
Figure 10. Port A Write Cycle Timing for FIFO1 (IDT Standard and FWFT Modes)
Figure 11. Port C Word Write Cycle Timing for FIFO2 (IDT Standard and FWFT Modes)
DATA SIZE TABLE FOR WORD WRITES TO FIFO2
NOTE:
1. BE is selected at Master Reset; SIZEB and SIZEC must be static throughout device operation.
SIZE MODE
(1)
WRITE DATA WRITTEN DATA READ FROM FIFO2
NO. TO FIFO2
SIZEC BE C17-C9 C8-C0 A35-A27 A26-A18 A17-A9 A8-A0
LH1ABABCD
2CD
LL1CDABCD
2AB
4676 drw12
CLKA
FFA/IRA
ENA
A0-A35
MBA
CSA
W/RA
tCLK
tCLKH
tCLKL
tENH
tENH
tENH
tENH
tDH
W1
(1)
W2
(1)
tENS2
tDS
tENS2
tENS2
tENS1
tENS1
tENH
tENH
tENS2
No Operation
HIGH
CLKC
WENC
t
ENH
t
ENH
FFC/IRC HIGH
4676 drw13
C0-C17
t
ENH
t
ENH
MBC
t
DH
t
DS
t
ENS2
t
ENS2
t
ENS2
t
ENS2
23
COMMERCIAL TEMPERATURE RANGE
IDT72V3686/72V3696/72V36106 3.3V CMOS TRIPLE BUS SyncFIFO
TM
WITH BUS-MATCHING 16,384 x 36 x 2, 32,768 x 36 x 2, 65, 536 x 36
DATA SIZE TABLE FOR WORD READS FROM FIFO1
SIZE MODE
(1)
DATA WRITTEN TO FIFO1 READ DATA READ FROM FIFO1
NO.
Figure 13. Port B Word Read Cycle Timing for FIFO1 (IDT Standard and FWFT Modes)
Figure 12. Port C Byte Write Cycle Timing for FIFO2 (IDT Standard and FWFT Modes)
NOTE:
1. BE is selected at Master Reset; SIZEB and SIZEC must be static throughout device operation.
SIZE MODE
(1)
WRITE DATA WRITTEN DATA READ FROM FIFO2
NO. TO FIFO2
SIZEC BE C8-C0 A35-A27 A26-A18 A17-A9 A8-A0
HH A B CD
HL A B CD
1A
2B
3C
4D
1D
2C
3B
4A
DATA SIZE TABLE FOR BYTE WRITES TO FIFO2
NOTE:
1. BE is selected at Master Reset; SIZEB and SIZEC must be static throughout device operation.
FFC/IRC
CLKC
t
ENH
t
ENS2
WENC
4676 drw14
HIGH
C0-C8
t
ENS2
t
ENH
t
ENS2
t
ENH
t
DS
t
DH
t
ENH
MBC
CLKB
RENB
EFB/ORB
CSB
HIGH
4676 drw15
B0-B17
Previous Data
t
DIS
t
A
t
A
t
ENS2
t
ENH
No Operation
Read 1
B0-B17
t
A
t
A
Read 1
Read 2
Read 2
Read 3
t
DIS
MBB
(Standard Mode)
(FWFT Mode)
OR
t
EN
t
MDV
t
MDV
t
EN
SIZEB BE A35-A27 A26-A18 A17-A9 A8-A0 B17-B9 B8-B0
HH A B C D1A B
2 C D
HL A B C D1 C D
2A B
24
COMMERCIAL TEMPERATURE RANGE
IDT72V3686/72V3696/72V36106 3.3V CMOS TRIPLE BUS SyncFIFO
TM
WITH BUS-MATCHING 16,384 x 36 x 2, 32,768 x 36 x 2, 65, 536 x 36
DATA SIZE TABLE FOR BYTE READS FROM FIFO1
SIZE MODE
(1)
DATA WRITTEN TO FIFO1 READ DATA READ FROM FIFO1
NO.
SIZEB BE A35-A27 A26-A18 A17-A9 A8-A0 B8-B0
HH ABCD
HL ABCD
1A
2B
3C
4D
1D
2C
3B
4A
NOTE:
1. Unused bytes B9-B17 are indeterminate for byte-size reads.
NOTE:
1. BE is selected at Master Reset; SIZEB must be static throughout device operation.
Figure 14. Port B Byte Read Cycle Timing for FIFO1 (IDT Standard and FWFT Modes)
NOTE:
1. Read From FIFO2.
Figure 15. Port A Read Cycle Timing for FIFO2 (IDT Standard and FWFT Modes)
EFB/ORB
MBB
CSB
RENB
CLKB
4676 drw16
HIGH
B0-B8
B0-B8
Read 5Read 2 Read 3
Read 4
Read 1
Read 3
Read 4
Previous Data
Read 2
No Operation
t
DIS
t
DIS
t
A
t
A
t
A
t
A
t
A
t
A
t
ENS2
t
ENH
t
A
t
A
Read 1
(Standard Mode)
(FWFT Mode)
t
EN
t
MDV
t
MDV
t
EN
OR
4676 drw17
CLKA
EFA/ORA
ENA
MBA
CSA
W/RA
t
CLK
t
CLKH
t
CLKL
t
ENS2
t
A
t
MDV
t
EN
t
A
t
ENS2
t
ENH
t
ENS2
t
ENH
W1
(1)
t
ENH
t
DIS
No Operation
A0-A35
t
EN
t
DIS
Previous Data
t
MDV
t
A
OR
t
A
W2
(1)
W1
(1)
W2
(1)
W3
(1)
(FWFT Mode)
(
Standard Mode)
A0-A35
HIGH

IDT72V36106L15PF8

Mfr. #:
Manufacturer:
Description:
IC FIFO 131KX36 15NS 128QFP
Lifecycle:
New from this manufacturer.
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