R8C/33T Group 5. Electrical Characteristics
R01DS0046EJ0110 Rev.1.10 Page 28 of 47
Apr 26, 2011
Figure 5.1 Ports P0 to P4 Timing Measurement Circuit
P0
P1
P2
P3
P4
30 pF
R8C/33T Group 5. Electrical Characteristics
R01DS0046EJ0110 Rev.1.10 Page 29 of 47
Apr 26, 2011
Notes:
1. Vcc/AVcc = Vref = 2.2 V to 5.5 V, Vss = 0 V at Topr =
20°C to 85°C (N version), unless otherwise specified.
2. The A/D conversion result will be undefined in wait mode, stop mode, when the flash memory stops, and in low-consumption
current mode. Do not perform A/D conversion in these states or transition to these states during A/D conversion.
3. When the analog input voltage is over the reference voltage, the A/D conversion result will be 3FFh in 10-bit mode and FFh in
8-bit mode.
Table 5.3 A/D Converter Characteristics
Symbol Parameter Conditions
Standard
Unit
Min. Typ. Max.
Resolution Vref = AVcc 10 Bit
Absolute accuracy 10-bit mode Vref = AVcc = 5.0 V AN0 to AN7 input
AN8 to AN11 input
——±3LSB
Vref = AVcc = 3.3 V AN0 to AN7 input
AN8 to AN11 input
——±5LSB
Vref = AVcc = 3.0 V AN0 to AN7 input
AN8 to AN11 input
——±5LSB
Vref = AVcc = 2.2 V AN0 to AN7 input
AN8 to AN11 input
——±5LSB
8-bit mode Vref = AVcc = 5.0 V AN0 to AN7 input
AN8 to AN11 input
——±2LSB
Vref = AVcc = 3.3 V AN0 to AN7 input
AN8 to AN11 input
——±2LSB
Vref = AVcc = 3.0 V AN0 to AN7 input
AN8 to AN11 input
——±2LSB
Vref = AVcc = 2.2 V AN0 to AN7 input
AN8 to AN11 input
——±2LSB
φAD A/D conversion clock
4.0 V
Vref = AVcc 5.5 V
(2)
2—20MHz
3.2 V
Vref = AVcc 5.5 V
(2)
2—16MHz
2.7 V
Vref = AVcc 5.5 V
(2)
2—10MHz
2.2 V
Vref = AVcc 5.5 V
(2)
2—5MHz
Tolerance level impedance 3 k
tCONV Conversion time 10-bit mode Vref = AVcc = 5.0 V, φAD = 20 MHz 2.2 µs
8-bit mode Vref = AVcc = 5.0 V,
φAD = 20 MHz 2.2 ms
t
SAMP Sampling time φAD = 20 MHz 0.8 µs
I
Vref Vref current Vcc = 5.0 V, XIN = f1 = φAD = 20 MHz 45 µA
V
ref Reference voltage 2.2 AVcc V
V
IA
Analog input voltage
(3)
0—VrefV
OCVREF On-chip reference voltage 2 MHz
φAD 4 MHz 1.19 1.34 1.49 V
R8C/33T Group 5. Electrical Characteristics
R01DS0046EJ0110 Rev.1.10 Page 30 of 47
Apr 26, 2011
Notes:
1. Vcc = 2.7 V to 5.5 V at Topr = 0
°C to 60°C, unless otherwise specified.
2. Definition of programming/erasure endurance
The programming and erasure endurance is defined on a per-block basis.
If the programming and erasure endurance is n (n = 1,000), each block can be erased n times. For example, if 1,024 1-byte
writes are performed to different addresses in block A, a 1 Kbyte block, and then the block is erased, the
programming/erasure endurance still stands at one.
However, the same address must not be programmed more than once per erase operation (overwriting prohibited).
3. Endurance to guarantee all electrical characteristics after program and erase. (1 to Min. value can be guaranteed).
4. In a system that executes multiple programming operations, the actual erasure count can be reduced by writing to sequential
addresses in turn so that as much of the block as possible is used up before performing an erase operation. For example,
when programming groups of 16 bytes, the effective number of rewrites can be minimized by programming up to 128 groups
before erasing them all in one operation. It is also advisable to retain data on the erasure endurance of each block and limit
the number of erase operations to a certain number.
5. If an error occurs during block erase, attempt to execute the clear status register command, then execute the block erase
command at least three times until the erase error does not occur.
6. Customers desiring program/erase failure rate information should contact their Renesas technical support representative.
7. The data hold time includes time that the power supply is off or the clock is not supplied.
Table 5.4 Flash Memory (Program ROM) Electrical Characteristics
Symbol Parameter Conditions
Standard
Unit
Min. Typ. Max.
Program/erase endurance
(2)
1,000
(3)
——times
Byte program time 80 500
µs
Block erase time 0.3 s
t
d(SR-SUS) Time delay from suspend request until
suspend
5 + CPU clock
× 3 cycles
ms
Interval from erase start/restart until
following suspend request
0—
µs
Time from suspend until erase restart 30 + CPU clock
× 1 cycle
µs
t
d(CMDRST
-READY)
Time from when command is forcibly
terminated until reading is enabled
30 + CPU clock
× 1 cycle
µs
Program, erase voltage 2.7 5.5 V
Read voltage 1.8 5.5 V
Program, erase temperature 0 60
°C
Data hold time
(7)
Ambient temperature = 55°C 20 year

R5F21336TNFP#50

Mfr. #:
Manufacturer:
Renesas Electronics
Description:
16-bit Microcontrollers - MCU R8/C33T 32+4K 1.8/5.5V -20TO85 32LQFP TR
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union