R8C/33T Group 1. Overview
R01DS0046EJ0110 Rev.1.10 Page 7 of 47
Apr 26, 2011
Note:
1. Can be assigned to the pin in parentheses by a program.
Table 1.4 Pin Name Information by Pin Number
Pin
Number
Control Pin Port
I/O Pin Functions for Peripheral Modules
Interrupt Timer Serial Interface A/D Converter
Sensor Control
Unit
1P4_2 VREF
2MODE
3
RESET
4XOUTP4_7
5 VSS/AVSS
6XINP4_6
7 VCC/AVCC
8P3_7
(INT3
)
TRAO/
(TRCCLK)
(RXD2/SCL2/
TXD2/SDA2)
9P3_5
(INT1
)
TRAIO/
(TRCIOD)
(CLK2)
10 P3_4
INT2
(TRCIOC) (RXD2/SCL2/
TXD2/SDA2)
11 P3_3
INT3
TRBO/
(TRCCLK)
(CTS2/RTS2)SCUTRG
12 P2_2 (TRCIOD) (RXD2/TXD2/
SCL2/SDA2)
CH17
13 P2_1 (TRCIOC) (CLK2) CH16
14 P2_0
(INT1
)
(TRCIOB) (RXD2/TXD2/
SCL2/SDA2)
CH15
15 P3_1 TRBO/
(TRCTRG/
TRCIOA)
(CTS2
/RTS2)
CH14
16 P4_5
INT0
(RXD2/SCL2)
ADTRG
CH13
17 P1_7
INT1
(TRAIO) CH12
18 P1_6 (CLK0) CH11
19 P1_5
(INT1
)
(TRAIO) (RXD0) CH10
20 P1_4 (TRCCLK) (TXD0) CH9
21 P1_3
KI3
TRBO
(/TRCIOC)
AN11 CH8
22 P1_2
KI2
(TRCIOB) AN10 CH7
23 P1_1
KI1
(TRCIOA/
TRCTRG)
AN9 CH6
24 P1_0
KI0
(TRCIOD) AN8 CH5
25 P0_7 (TRCIOC) AN0 CH4
26 P0_6 (TRCIOD) AN1 CH3
27 P0_5 (TRCIOB) (CLK2) AN2 CH2
28 P0_4 (TRCIOB) AN3 CH1
29 P0_3 (TRCIOB) AN4 CH0
30 P0_2 (TRCIOA/
TRCTRG)
AN5 CHxA
31 P0_1 (TRCIOA/
TRCTRG)
AN6 CHxB
32 P0_0 (TRCIOA/
TRCTRG)
(TXD2/SDA2) AN7 CHxC
R8C/33T Group 1. Overview
R01DS0046EJ0110 Rev.1.10 Page 8 of 47
Apr 26, 2011
1.5 Pin Functions
Table 1.5 lists Pin Functions.
I: Input O: Output I/O: Input and output
Note:
1. Refer to the oscillator manufacturer for oscillation characteristics.
Table 1.5 Pin Functions
Item Pin Name
I/O
Type
Description
Power supply input VCC, VSS Apply 1.8 V to 5.5 V to the VCC pin. Apply 0 V to the VSS pin.
Analog power
supply input
AVCC, AVSS Power supply for the A/D converter.
Connect a capacitor between AVCC and AVSS.
Reset input
RESET
I Input “L” on this pin resets the MCU.
MODE MODE I Connect this pin to VCC via a resistor.
XIN clock input XIN I These pins are provided for XIN clock generation circuit I/O.
Connect a ceramic resonator or a crystal oscillator between
the XIN and XOUT pins.
(1)
To use an external clock, input it to the XOUT pin and leave
the XIN pin open.
XIN clock output XOUT I/O
INT
interrupt input INT0 to INT3
I
INT interrupt input pins.
INT0
is timer RB, and RC input pin.
Key input interrupt
KI0
to KI3
I Key input interrupt input pins
Timer RA TRAIO I/O Timer RA I/O pin
TRAO O Timer RA output pin
Timer RB TRBO O Timer RB output pin
Timer RC TRCCLK I External clock input pin
TRCTRG I External trigger input pin
TRCIOA, TRCIOB,
TRCIOC, TRCIOD
I/O Timer RC I/O pins
Serial interface CLK0, CLK2 I/O Transfer clock I/O pins
RXD0, RXD2 I Serial data input pins
TXD0, TXD2 O Serial data output pins
CTS2
I Transmission control input pin
RTS2
O Reception control output pin
SCL2 I/O
I
2
C mode clock I/O pin
SDA2 I/O
I
2
C mode data I/O pin
Reference voltage
input
VREF I Reference voltage input pin to A/D converter
A/D converter AN0 to AN11 I Analog input pins to A/D converter
ADTRG
I AD external trigger input pin
Sensor control unit CHxA, CHxB, CHxC I/O Control pins for electrostatic capacitive touch detection
CH0 to CH17 I Electrostatic capacitive touch detection pins
SCUTRG
I Sensor control unit external trigger input
I/O port P0_0 to P0_7,
P1_0 to P1_7,
P2_0 to P2_2,
P3_1,
P3_3 to P3_5,
P3_7,
P4_5 to P4_7
I/O CMOS I/O ports. Each port has an I/O select direction
register, allowing each pin in the port to be directed for input
or output individually.
Any port set to input can be set to use a pull-up resistor or not
by a program.
All ports can be used as LED drive ports.
Input port P4_2 I Input-only port
R8C/33T Group 2. Central Processing Unit (CPU)
R01DS0046EJ0110 Rev.1.10 Page 9 of 47
Apr 26, 2011
2. Central Processing Unit (CPU)
Figure 2.1 shows the CPU Registers. The CPU contains 13 registers. R0, R1, R2, R3, A0, A1, and FB configure a
register bank. There are two sets of register bank.
Figure 2.1 CPU Registers
R2
b31
b15 b8b7
b0
Data registers
(1)
Address registers
(1)
R3
R0H (high-order of R0)
R2
R3
A0
A1
INTBH
b15b19
b0
INTBL
FB
Frame base register
(1)
The 4 high order bits of INTB are INTBH and
the 16 low order bits of INTB are INTBL.
Interrupt table register
b19
b0
USP
Program counter
ISP
SB
User stack pointer
Interrupt stack pointer
Static base register
PC
FLG
Flag register
Carry flag
Debug flag
Zero flag
Sign flag
Register bank select flag
Overflow flag
Interrupt enable flag
Stack pointer select flag
Reserved bit
Processor interrupt priority level
Reserved bit
C
IPL
DZSBOIU
b15
b0
b15
b0
b15
b0
b8
b7
Note:
1. These registers comprise a register bank. There are two register banks.
R1H (high-order of R1)
R0L (low-order of R0)
R1L (low-order of R1)

R5F21336TNFP#50

Mfr. #:
Manufacturer:
Renesas Electronics
Description:
16-bit Microcontrollers - MCU R8/C33T 32+4K 1.8/5.5V -20TO85 32LQFP TR
Lifecycle:
New from this manufacturer.
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