TDF8599A_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 30 June 2009 4 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
7. Pinning information
7.1 Pinning
7.2 Pin description
Fig 2. Heatsink up (top view) pin configuration TDF8599ATH
TDF8599ATH
OUT1N
IN1P
BOOT1N
IN1N
V
P1
IN2P
PGND1
GNDD/HW
V
DDD
VSTAB1
IN2N
BOOT1P
ACGND
OUT1P
EN
OUT2P
SEL_MUTE
BOOT2P
SVRR
PGND2
AGND
V
P2
V
DDA
ADS
MOD
001aak072
36
35
34
33
32
31
30
29
28
27
26
25
11
12
9
10
7
8
CLIP
BOOT2N DIAG
OUT2N SDA
VSTAB2 SCL
24
23
22
21
15
16
13
14
DCP SSM
OSCIO OSCSET
20
19
17
18
5
6
3
4
1
2
Table 3. Pin description
Symbol Pin Type
[1]
Description
IN1P 1 I channel 1 positive audio input
IN1N 2 I channel 1 negative audio input
IN2P 3 I channel 2 positive audio input
IN2N 4 I channel 2 negative audio input
ACGND 5 I decoupling for input reference voltage
EN 6 I enable input:
non-I
2
C-bus mode: switch between off and Mute mode
I
2
C-bus mode: off and Standby mode
SEL_MUTE 7 I select mute or unmute
SVRR 8 I decoupling for internal half supply reference voltage
AGND 9 G analog supply ground
V
DDA
10 P analog supply voltage
ADS 11 I non-I
2
C-bus mode: connected to ground
I
2
C-bus mode: selection and address selection pin
MOD 12 I modulation mode, phase shift and parallel mode select
TDF8599A_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 30 June 2009 5 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
[1] I = input, O = output, I/O = input/output, G = ground and P = power supply.
[2] In this data sheet supply voltage V
P
describes V
P1
, V
P2
and V
PA
.
8. Functional description
8.1 General
The TDF8599A is a dual full bridge (BTL) audio power amplifier using class-D technology.
The audio input signal is converted into a Pulse-Width Modulated (PWM) signal using the
analog input and PWM control stages. A PWM signal is applied to driver circuits for both
high-side and low-side enabling the DMOS power output transistors to be driven. An
external 2
nd
order low-pass filter converts the PWM signal into an analog audio signal
across the loudspeakers.
CLIP 13 O clip output; open-drain
DIAG 14 O diagnostic output; open-drain
SDA 15 I/O I
2
C-bus data input and output
SCL 16 I I
2
C-bus clock input
SSM 17 master setting: Spread spectrum mode frequency
slave setting: phase lock operation
OSCSET 18 master/slave oscillator setting
master only setting: set internal oscillator frequency
OSCIO 19 I/O external oscillator slave setting: input
internal oscillator master setting: output
DCP 20 I DC protection input for the filtered output voltages
VSTAB2 21 decoupling internal stabilizer 2 for DMOST drivers
OUT2N 22 O channel 2 negative PWM output
BOOT2N 23 boot 2 negative bootstrap capacitor
V
P2
[2]
24 P channel 2 power supply voltage
PGND2 25 G channel 2 power ground
BOOT2P 26 boot 2 positive bootstrap capacitor
OUT2P 27 O channel 2 positive PWM output
OUT1P 28 O channel 1 positive PWM output
BOOT1P 29 boot 1 positive bootstrap capacitor
PGND1 30 G channel 1 power ground
V
P1
[2]
31 P channel 1 power supply voltage
BOOT1N 32 boot 1 negative bootstrap capacitor
OUT1N 33 O channel 1 negative PWM output
VSTAB1 34 decoupling internal stabilizer 1 for DMOST drivers
V
DDD
35 decoupling of the internal 5 V logic supply
GNDD/HW 36 G ground digital supply voltage
handle wafer connection
Table 3. Pin description
…continued
Symbol Pin Type
[1]
Description
TDF8599A_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 30 June 2009 6 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
The TDF8599A includes integrated common circuits for all channels such as the oscillator,
all reference sources, mode functionality and a digital timing manager. In addition, the
built-in protection includes thermal foldback, temperature, overcurrent and overvoltage
(load dump).
The TDF8599A operates in either I
2
C-bus mode or non-I
2
C-bus mode. In I
2
C-bus mode,
DC load detection, frequency hopping and extended configuration functions are provided
together with enhanced diagnostic information.
8.2 Mode selection
The mode pins EN, ADS and SEL_MUTE enable mute state, I
2
C-bus mode and Operating
mode switching.
Pin SEL_MUTE is used to mute and unmute the device and must be connected to an
external capacitor (C
ON
). This capacitor generates a time constant which is used to
ensure smooth fade-in and fade-out of the input signal.
The TDF8599A is enabled when pin EN is HIGH. When pin EN is LOW, the TDF8599A is
off and the supply current is at its lowest value (typically 2 µA). When off, the TDF8599A is
completely deactivated and will not react to I
2
C-bus commands.
I
2
C-bus mode is selected by connecting a resistor between pins ADS and AGND. In
I
2
C-bus mode with pin EN HIGH, the TDF8599A waits for further commands (see
Table 4). I
2
C-bus mode is described in Section 9 on page 23.
Non-I
2
C-bus mode is selected by connecting pin ADS to pin AGND. In non-I
2
C-bus mode,
the default TDF8599A state is Mute mode. The amplifiers switch idle (50 % duty cycle)
and the audio signal is suppressed at the output. In addition, the capacitor (C
SVRR
) is
charged to half the supply voltage. To enter Operating mode, pin SEL_MUTE must be
HGH with S1 open, enabling capacitor (C
ON
) charged by an internal pull-up (see
Figure 3). In addition, pin EN must be driven HIGH.
I
2
C-bus mode and non-I
2
C-bus mode control are described in Table 4 on page 7 and
Table 5 on page 7. Switches S1 and S2 are shown in Figure 3.
a. Non-I
2
C-bus mode b. I
2
C-bus mode
See Table 13 for detailed information on
R
ADS
.
Fig 3. Mode selection
001aak073
SEL_MUTE
EN
3.3 V
C
ON
S1
S2
TDF8599A
ADS
AGND
001aak074
SEL_MUTE
EN
3.3 V
C
ON
S2
TDF8599A
ADS
R
ADS
AGND

TDF8599ATH/N2/S6CY

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC POWER AMP CLASS D I2C 36HSOP
Lifecycle:
New from this manufacturer.
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