TDF8599A_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 30 June 2009 5 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
[1] I = input, O = output, I/O = input/output, G = ground and P = power supply.
[2] In this data sheet supply voltage V
P
describes V
P1
, V
P2
and V
PA
.
8. Functional description
8.1 General
The TDF8599A is a dual full bridge (BTL) audio power amplifier using class-D technology.
The audio input signal is converted into a Pulse-Width Modulated (PWM) signal using the
analog input and PWM control stages. A PWM signal is applied to driver circuits for both
high-side and low-side enabling the DMOS power output transistors to be driven. An
external 2
nd
order low-pass filter converts the PWM signal into an analog audio signal
across the loudspeakers.
CLIP 13 O clip output; open-drain
DIAG 14 O diagnostic output; open-drain
SDA 15 I/O I
2
C-bus data input and output
SCL 16 I I
2
C-bus clock input
SSM 17 master setting: Spread spectrum mode frequency
slave setting: phase lock operation
OSCSET 18 master/slave oscillator setting
master only setting: set internal oscillator frequency
OSCIO 19 I/O external oscillator slave setting: input
internal oscillator master setting: output
DCP 20 I DC protection input for the filtered output voltages
VSTAB2 21 decoupling internal stabilizer 2 for DMOST drivers
OUT2N 22 O channel 2 negative PWM output
BOOT2N 23 boot 2 negative bootstrap capacitor
V
P2
[2]
24 P channel 2 power supply voltage
PGND2 25 G channel 2 power ground
BOOT2P 26 boot 2 positive bootstrap capacitor
OUT2P 27 O channel 2 positive PWM output
OUT1P 28 O channel 1 positive PWM output
BOOT1P 29 boot 1 positive bootstrap capacitor
PGND1 30 G channel 1 power ground
V
P1
[2]
31 P channel 1 power supply voltage
BOOT1N 32 boot 1 negative bootstrap capacitor
OUT1N 33 O channel 1 negative PWM output
VSTAB1 34 decoupling internal stabilizer 1 for DMOST drivers
V
DDD
35 decoupling of the internal 5 V logic supply
GNDD/HW 36 G ground digital supply voltage
handle wafer connection
Table 3. Pin description
…continued
Symbol Pin Type
[1]
Description