10
FN8172.4
August 29, 2006
DEVICE DESCRIPTION
Wiper Counter Register (WCR)
The X9268 contains two Wiper Counter Registers, one
for each DCP potentiometer. The Wiper Counter
Register can be envisioned as a 8-bit parallel and
serial load counter with its outputs decoded to select
one of 256 switches along its resistor array. The
contents of the WCR can be altered in four ways: it
may be written directly by the host via the Write Wiper
Counter Register instruction (serial load); it may be
written indirectly by transferring the contents of one of
four associated data registers via the XFR Data
Register instruction (parallel load); it can be modified
one step at a time by the Increment/Decrement
instruction (See Instruction section for more details).
Finally, it is loaded with the contents of its Data
Register zero (DR0) upon power-up.
The Wiper Counter Register is a volatile register; that
is, its contents are lost when the X9268 is powered-
down. Although the register is automatically loaded
with the value in DR0 upon power-up, this may be
different from the value present at power-down.
Power-up guidelines are recommended to ensure
proper loadings of the DR0 value into the WCR (See
Design Considerations Section).
Data Registers (DR)
Each potentiometer has four 8-bit nonvolatile Data
Registers. These can be read or written directly by the
host. Data can also be transferred between any of the
four Data Registers and the associated Wiper Counter
Register. All operations changing data in one of the
data registers is a nonvolatile operation and will take a
maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can
be used as regular memory locations for system
parameters or user preference data.
Bit [7:0] are used to store one of the 256 wiper
positions (0~255).
Table 4. Wiper counter Register, WCR (8-bit), WCR[7:0]: Used to store the current wiper position (Volatile, V).
Table 5. Data Register, DR (8-bit), Bit [7:0]: Used to store wiper positions or data (Nonvolatile, NV).
WCR7 WCR6 WCR5 WCR4 WCR3 WCR2 WCR1 WCR0
VVVVVVVV
(MSB) (LSB)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
NV NV NV NV NV NV NV NV
MSB LSB
X9268
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FN8172.4
August 29, 2006
DEVICE DESCRIPTION
Instructions
Four of the nine instructions are three bytes in length.
These instructions are:
Read Wiper Counter Register – read the current
wiper position of the selected potentiometer,
Write Wiper Counter Register – change current
wiper position of the selected potentiometer,
Read Data Register – read the contents of the
selected Data Register;
Write Data Register – write a new value to the
selected Data Register.
The basic sequence of the three byte instructions is
illustrated in Figure 4. These three-byte instructions
exchange data between the WCR and one of the Data
Registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the
wiper to this action will be delayed by t
WRL
. A transfer
from the WCR (current wiper position), to a Data
Register is a write to nonvolatile memory and takes a
minimum of t
WR
to complete. The transfer can occur
between one of the four potentiometers and one of its
associated registers; or it may occur globally, where
the transfer occurs between all potentiometers and
one associated register
Four instructions require a two-byte sequence to
complete. These instructions transfer data between the
host and the X9268; either between the host and one of
the data registers or directly between the host and the
Wiper Counter Register. These instructions are:
XFR Data Register to Wiper Counter Register
This transfers the contents of one specified Data
Register to the associated Wiper Counter Register.
XFR Wiper Counter Register to Data Register
This transfers the contents of the specified Wiper
Counter Register to the specified associated Data
Register.
Global XFR Data Register to Wiper Counter
Register – This transfers the contents of all speci-
fied Data Registers to the associated Wiper Counter
Registers.
Global XFR Wiper Counter Register to Data
Register – This transfers the contents of all Wiper
Counter Registers to the specified associated Data
Registers.
INCREMENT/DECREMENT COMMAND
The final command is Increment/Decrement (Figure 5
and 6). The Increment/Decrement command is
different from the other commands. Once the
command is issued and the X9268 has responded
with an acknowledge, the master can clock the
selected wiper up and/or down in one segment steps;
thereby, providing a fine tuning capability to the host.
For each SCL clock pulse (t
HIGH
) while SDA is HIGH,
the selected wiper will move one resistor segment
towards the R
H
terminal. Similarly, for each SCL clock
pulse while SDA is LOW, the selected wiper will move
one resistor segment towards the R
L
terminal.
See Instruction format for more details.
X9268
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FN8172.4
August 29, 2006
Figure 3. Two-Byte Instruction Sequence
Figure 4. Three-Byte Instruction Sequence
Figure 5. Increment/Decrement Instruction Sequence
Figure 6. Increment/Decrement Timing Limits
S
T
A
R
T
0101
A2 A0
A
C
K
I2 I1
I0
RB RA 0
A
C
K
SCL
SDA
S
T
O
P
ID3 ID2 ID1 ID0
P0
Device ID
Internal
Instruction
Opcode
Address
Register
Address
Pot/WCR
Address
A1
A3
I3
I3
I2
I1
I0
RB RA
ID3 ID2
ID1
ID0
Device ID
Internal
Instruction
Opcode
Address
Register
Address
Pot/WCR
Address
WCR[7:0]
or
Data Register D[7:0]
S
T
A
R
T
0101
A2 A1 A0
A
C
K
0P0A
C
K
SCL
SDA
S
T
O
P
A
C
K
D7 D6 D5 D4 D3 D2 D1 D0
A3
0
I3 I2
I1
I0
ID3 ID2 ID1 ID0
Device ID
Internal
Instruction
Opcode
Address
Register
Address
Pot/WCR
Address
S
T
A
R
T
0101
A2 A1 A0
A
C
K
RA 0 P0
A
C
K
SCL
SDA
S
T
O
P
I
N
C
1
I
N
C
2
I
N
C
n
D
E
C
1
D
E
C
n
RB
A3
0
SCL
SDA
R
W
INC/DEC
CMD
Issued
Voltage Out
t
WRID
X9268

X9268TS24IZ-2.7T1

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs DL DCP 100KOHM 256 TAPS 2-WIRE
Lifecycle:
New from this manufacturer.
Delivery:
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