4
FN8172.4
August 29, 2006
PIN CONFIGURATION
PIN ASSIGNMENTS
Pin
(SOIC) Symbol Function
1 NC No Connect
2 A0 Device Address for 2-Wire bus.
3 NC No Connect
4 NC No Connect
5 NC No Connect
6 V+ Analog Suppy Pin (Positive)
7V
CC
System Supply Voltage
8R
L0
Low Terminal for Potentiometer 0.
9R
H0
High Terminal for Potentiometer 0.
10 R
W0
Wiper Terminal for Potentiometer 0.
11 A2 Device Address for 2-Wire bus.
12 WP
Hardware Write Protect
13 SDA Serial Data Input/Output for 2-Wire bus.
14 A1 Device Address for 2-Wire bus.
15 R
L1
Low Terminal for Potentiometer 1.
16 R
H1
High Terminal for Potentiometer 1.
17 R
W1
Wiper Terminal for Potentiometer 1.
18 V
SS
System Ground
19 V- Analog Supply Pin (Negative)
20 NC No Connect
21 NC No Connect
22 NC No Connect
23 SCL Serial Clock for 2-Wire bus.
24 A3 Device Address for 2-Wire bus.
NC
A0
NC
V+
V
CC
R
L0
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
A3
SCL
NC
NC
NC
V-
V
SS
R
W1
R
H1
R
L1
24 LD SOIC
X9268
NC
14
13
11
12
NC
R
H0
R
W0
A2
A1
SDA
WP
X9268
5
FN8172.4
August 29, 2006
PIN DESCRIPTIONS
Bus Interface Pins
S
ERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin
for a 2-Wire slave device and is used to transfer data
into and out of the device. It receives device address,
opcode, wiper register address and data sent from an
2-Wire master at the rising edge of the serial clock
SCL, and it shifts out data after each falling edge of
the serial clock SCL.
It is an open drain output and may be wire-ORed with
any number of open drain or open collector outputs.
An open drain output requires the use of a pull-up
resistor. For selecting typical values, refer to the
guidelines for calculating typical values on the bus
pull-up resistors graph.
S
ERIAL CLOCK (SCL)
This input is used by 2-Wire master to supply 2-Wire
serial clock to the X9268.
D
EVICE ADDRESS (A3 - A0)
The address inputs are used to set the least significant
3 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
Address input in order to initiate communication with
the X9268. A maximum of 8 devices may occupy the
2-Wire serial bus.
Potentiometer Pins
R
H
, R
L
The R
H
and R
L
pins are equivalent to the terminal
connections on a mechanical potentiometer. Since
there are 2 potentiometers, there are 2 sets of R
H
and
R
L
such that R
H0
and R
L0
are the terminals of POT 0
and so on.
R
W
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer. Since there are 4
potentiometers, there are 2 sets of R
W
such that R
W0
is the terminal of POT 0 and so on.
Bias Supply Pins
S
YSTEM SUPPLY VOLTAGE (V
CC
) AND SUPPLY
G
ROUND (V
SS
)
The V
CC
pin is the system supply voltage. The V
SS
pin is the system ground.
Analog Supply Voltages (V+ and V
-)
These supplies are the analog voltage supplies for the
potentiometer. The V+ supply is tied to the wiper
switches while the V- supply is used to bias the
switches and the internal P+ substrate of the
integrated circuit. Both of these supplies set the
voltage limits of the potentiometer.
Other Pins
N
O CONNECT
No connect pins should be left open. This pins are
used for Intersil manufacturing and testing purposes.
H
ARDWARE WRITE PROTECT INPUT (WP)
The WP
pin when LOW prevents nonvolatile writes to
the Data Registers.
X9268
6
FN8172.4
August 29, 2006
PRINCIPLES OF OPERATION
The X9268 is a integrated microcircuit incorporating
four resistor arrays and their associated registers and
counters and the serial interface logic providing direct
communication between the host and the digitally
controlled potentiometers. This section provides detail
description of the following:
Resistor Array Description
Serial Interface Description
Instruction and Register Description.
Array Description
The X9268 is comprised of a resistor array (See
Figure 1). Each array contains 255 discrete resistive
segments that are connected in series. The physical
ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (R
H
and R
L
inputs).
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(R
W
) output. Within each individual array only one
switch may be turned on at a time.
These switches are controlled by a Wiper Counter
Register (WCR). The 8-bits of the WCR (WCR[7:0])
are decoded to select, and enable, one of 256
switches (See Table 1).
The WCR may be written directly. These Data
Registers can the WCR can be read and written by the
host system.
Power-up and Down Requirements.
At all times, the voltages on the potentiometer pins
must be less than V+ and more than V-. During power-
up and power-down, V
CC
, V+, and V- must reach their
final values within 1msecs of each other. The V
CC
ramp rate spec is always in effect.
Figure 1. Detailed Potentiometer Block Diagram
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
REGISTER 0 REGISTER 1
REGISTER 2 REGISTER 3
SERIAL
BUS
INPUT
PARALLEL
BUS
INPUT
COUNTER
REGISTER
INC/DEC
LOGIC
UP/DN
CLK
MODIFIED SCL
UP/DN
R
H
R
L
R
W
8 8
C
O
U
N
T
E
R
D
E
C
O
D
E
IF WCR = 00[H] THEN R
W
= R
L
IF WCR = FF[H] THEN R
W
= R
H
WIPER
(WCR)
One of Two Potentiometers
(DR0) (DR1)
(DR2) (DR3)
X9268

X9268TS24IZ-2.7T1

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs DL DCP 100KOHM 256 TAPS 2-WIRE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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