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844S42BKILF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
10©2016 Integrated Device Technology, Inc Revision A April 28, 2016
844S42I Data Sheet
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 3.3V ± 5%, T
A
= -40°C to 85°C
NOTE: Refer to the Power Considerations section. In LVDS output mode, the I
DD,
I
DDA
and I
DDO
specifications apply. I
DDO
is the current
through all V
DDOA
and V
DDOB
pins. In LVPECL mode, the IGND specification applies. IGND is the current through all GND pins.
Item Rating
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5V
Outputs, I
O
(LVPECL)
Continuous Current
Surge Current
Outputs, I
O
(LVDS)
Continuos Current
Surge Current
Outputs, V
O
(LVCMOS)
50mA
100mA
10mA
15mA
-0.5V to V
DDO
+ 0.5V
Package Thermal Impedance,
JA
31.4°C/W (0 mps)
Storage Temperature, T
STG
-65C to 150C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Core Supply Voltage 3.135 3.3 3.465 V
V
DDA
Analog Supply Voltage V
DD
– 0.23 3.3 V
DD
V
V
DDOA,
V
DDOB
Output Supply Voltage 3.135 3.3 3.465 V
I
DD
Power Supply Current LEV_SEL = 0 195 mA
I
DDA
Analog Supply Current LEV_SEL = 0 23 mA
I
DDOA
+
I
DDOB
Output Supply Current LEV_SEL = 0 52 mA
I
GND
Power Supply Current LEV_SEL = 1 275 mA
11©2016 Integrated Device Technology, Inc Revision A April 28, 2016
844S42I Data Sheet
Table 4B. LVCMOS/LVTTL DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
Table 4C. LVDS DC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 3.3V ± 5%, T
A
= -40°C to 85°C
Table 4D. LVPECL DC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 3.3V ± 5%, T
A
= -40°C to 85°C
NOTE 1: Outputs termination with 50 to V
DDOx
– 2V.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2.2 V
DD
+ 0.3 V
V
IL
Input Low Voltage -0.3 0.8 V
I
IH
Input High Current
REF_CLK, nPLOAD,
LEV_SEL, ADR[1:0],
NA[0:2], NB[0:2], M1,
M2, M3, M7, M8,
nBYPASS
V
DD
= V
IN
= 3.465V 150 µA
M0, M4, M5, M6, M9,
P, nMR, SDA, SCL,
REF_SEL
V
DD
= V
IN
= 3.465V 10 µA
I
IL
Input Low Current
REF_CLK, nPLOAD,
LEV_SEL, ADR[1:0],
NA[0:2], NB[0:2], M1,
M2, M3, M7, M8,
nBYPASS
V
DD
= 3.465V, V
IN
= 0V -10 µA
M0, M4, M5, M6, M9,
P, nMR, SDA, SCL,
REF_SEL
V
DD
= 3.465V, V
IN
= 0V -150 µA
V
OH
Output High Voltage LOCK_DT I
OH
= -12mA 2.6 V
V
OL
Output Low Voltage LOCK_DT I
OL
= 12mA 0.5 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OD
Differential Output Voltage LEV_SEL = 0 300 400 500 V
V
OD
V
OD
Magnitude Change LEV_SEL = 0 50 mV
V
OS
Offset Voltage LEV_SEL = 0 1.1 1.2 1.3 V
V
OS
V
OS
Magnitude Change LEV_SEL = 0 50 mV
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 LEV_SEL = 1 V
DDOx
– 1.2 V
DDOx
– 0.8 V
V
OL
Output Low Voltage; NOTE 1 LEV_SEL = 1 V
DDOx
– 2.0 V
DDOx
– 1.4 V
V
SWING
Peak-to-Peak Output Voltage Swing LEV_SEL = 1 0.6 1 V
12©2016 Integrated Device Technology, Inc Revision A April 28, 2016
844S42I Data Sheet
Table 5. Crystal Characteristics
AC Electrical Characteristics
Table 6. AC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 3.3V ± 5%, T
A
= -40°C to +85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Defined as skew between output at the same supply voltage and with equal load conditions. Measured from V
DD
/2 of the input to the
differential crossing point.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Other output divider combinations may yield much greater output skews.
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
Frequency 16 MHz
Equivalent Series Resistance (ESR) 50
Shunt Capacitance 7pF
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
REF
Input Reference Frequency 16 MHz
f
VCO
VCO frequency range 1296 2592 MHz
f
OUT
QA, QB Output frequency
NA, NB = ÷1 1296 2592 MHz
NA, NB = ÷2 648 1296 MHz
NA, NB = ÷3 432 864 MHz
NA, NB = ÷4 324 648 MHz
NA, NB = ÷6 216 432 MHz
NA, NB = ÷8 162 324 MHz
NA, NB = ÷16 81 162 MHz
tsk(o)
Output Skew
NOTE 1, 2, 3
f
QA
= f
QB
NA, NB = ÷1 15 ps
NA, NB ÷1 25 ps
f
QA
f
QB
across QA and QB at
coincident edges,
NA, NB = ÷2 or ÷4
80 ps
across QA and QB at
coincident edges,
NA, NB = ÷4 or ÷8
35 ps
tjit(cc) Cycle-to-Cycle Jitter f
QA
= f
QB
25 ps
tjit(per) RMS Period Jitter
f
QA
= f
QB
f > 2GHz 3.4 ps rms
f
QA
= f
QB
f 1GHz 3.0 ps rms
f
QA
= f
QB
1GHz < f 2GHz 2.5 ps rms
t
R
/ t
F
Output
Rise/Fall Time
LVDS, LVPECL 20% to 80% 60 220 ps
odc Output Duty Cycle QA, QB
NA, NB = ÷1, LEV_SEL = 0 45 55 %
NA, NB = ÷1, LEV_SEL = 1 44 56 %
NA, NB = ÷2 46 54 %
NA, NB = ÷3 47 53 %
NA, NB = ÷4, ÷6, ÷8, ÷16 48 52 %
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28

844S42BKILF

Mfr. #:
Buy 844S42BKILF
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner LVPECL/LVDS 2-OUT RF SYNTHESIZER
Lifecycle:
New from this manufacturer.
Delivery:
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