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MAX2160ETL+T

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25
MAX2160/MAX2160EBG
ISDB-T Single-Segment Low-IF Tuners
10 ______________________________________________________________________________________
Pin Description (continued)
PIN BUMP NO.
TQFN WLP
NAME DESCRIPTION
20 39 VCCFLT
DC Power Supply for Baseband Filter Circuits. Connect to a +2.85V low-noise
supply. Bypass to GND with a 100pF capacitor connected as close to the pin as
possible. Do not share capacitor ground vias with other ground connections.
22 37 ENTCXO
XTAL/TCXO Select. Logic-high enables the TCXO input and disables the XTAL input.
Logic-low disables the TCXO input and enables the XTAL input. This pin is internally
pulled up to V
CC
.
23 47 GC2
Baseband Gain-Control Input. High-impedance analog input, with a 0.3V to 2.7V
operating range. V
GC2
= 0.3V corresponds to the maximum gain setting.
25 44 IOUT In-Phase Low-IF Output. Requires a DC-blocking capacitor.
26 — GNDBB Ground for Baseband Circuits. Connect to the PC board ground plane.
27 43 QOUT Quadrature Low-IF Output. Requires a DC-blocking capacitor.
29 41 VCCBB
DC Power Supply for Baseband Circuits. Connect to a +2.85V low-noise supply.
Bypass to GND with a 100pF capacitor connected as close to the pin as possible.
Do not share capacitor ground vias with other ground connections.
32 30 VCOBYP
Internal VCO Bias Bypass. Bypass directly to GNDVCO with a 470nF capacitor
connected as close to the pin as possible. Do not share capacitor ground vias with
other ground connections. See the Layout Considerations section.
33 26 VCCVCO
DC Power Supply for VCO Circuits. Connect to a +2.85V low-noise supply. Bypass
directly to GNDVCO with a 100pF capacitor connected as close to the pin as
possible. Do not share capacitor ground vias with other ground connections.
34 23 GNDVCO
VCO Circuit Ground. Connect to the PC board ground plane. See the Layout
Considerations section.
35 32 VTUNE
High-Impedance VCO Tune Input. Connect the PLL loop filter output directly to this
pin with the shortest connection as possible.
36 20 GNDTUNE
Ground for VTUNE. Connect to the PC board ground plane. See the Layout
Considerations section.
37 18 TEST Test Output. Used as a test output for various internal blocks. See Table 2.
38 16 CPOUT
Charge-Pump Output. Connect this output to the PLL loop filter input with the
shortest connection possible.
39 10 VCCCP
DC Power Supply for Charge-Pump Circuits. Connect to a +2.85V low-noise supply.
Bypass to GND with a 100pF capacitor connected as close to the pin as possible.
Do not share capacitor ground vias with other ground connections.
40 1 GNDCP
Charge-Pump Circuit Ground. Connect to the PC board ground plane. See the
Layout Considerations section.
EP — GND
Exposed Paddle (TQFN Only). Solder evenly to the board’s ground plane for proper
operation.
—
3, 6, 8, 13, 15,
27, 31, 40, 42
GND Ground. Connect to the PC board ground plane.
— 21 GNDLNA Ground for LNA. Connect to ground with trace.
MAX2160/MAX2160EBG
ISDB-T Single-Segment Low-IF Tuners
______________________________________________________________________________________ 11
Detailed Description
All registers must be written after power-up and no ear-
lier than 100µs after power-up.
Register Descriptions
The MAX2160/EBG include eight programmable regis-
ters and two read-only registers. The eight programma-
ble registers include a test register, a PLL register, a
VCO register, a control register, a XTAL divide register,
an R-divider register, and two N-divider registers. The
read-only registers include two status registers.
Table 1. Register Configuration
MSB LSB
DATA BYTE
REGISTER
NUMBER
REGISTER
NAME
READ/
WRITE
REGISTER
ADDRESS
D7 D6 D5 D4 D3 D2 D1 D0
1 TEST WRITE 0x00 TUN2 TUN1 TUN0 FLTS MXSD D2 D1 D0
2 PLL WRITE 0x01 CP1 CP0 CPS EPB RPD NPD TON VAS
3 VCO WRITE 0x02 VCO1 VCO0 VSB2 VSB1 VSB0 ADL ADE LTC
4 CONTROL WRITE 0x03 MOD BBL1 BBL0 HSLS PD2 PD1 PD0 EPD
5 XTAL DIVIDE WRITE 0x04 XD4 XD3 XD2 XD1 XD0 PWDN STBY QOFF
6 R-DIVIDER WRITE 0x05 R7 R6 R5 R4 R3 R2 R1 R0
7 N-DIVIDER MSB WRITE 0x06 N12 N11 N10 N9 N8 N7 N6 N5
8 N-DIVIDER LSB WRITE 0x07 N4 N3 N2 N1 N0 X X X
9 STATUS BYTE-1 READ — X X X CP1 CP0 PWR VASA VASE
10 STATUS BYTE-2 READ — VCO1 VCO0 VSB2 VSB1 VSB0 ADC2 ADC1 ADC0
Table 2. Test Register
BIT NAME
BIT LOCATION
(0 = LSB)
RECOMMENDED
DEFAULT
FUNCTION
TUN[2:0] 7, 6, 5 000
Set the baseband bandpass filter center frequency. This filter’s center frequency
is trimmed at the factory, but may be manually adjusted by clearing the FLTS bit
and programming the TUN[2:0] bits as follows:
000 = 0.75 x f
O
001 = 0.80 x f
O
010 = 0.86 x f
O
011 = 0.92 x f
O
100 = f
O
(nominal center frequency of 571kHz)
101 = 1.08 x f
O
110 = 1.19 x f
O
111 = 1.32 x f
O
FLTS 4 1
Selects which registers set the baseband bandpass filter center frequency.
1 = selects internal factory-set register
0 = selects manual trim register TUN[2:0]
MAX2160/MAX2160EBG
ISDB-T Single-Segment Low-IF Tuners
12 ______________________________________________________________________________________
Table 2. Test Register (continued)
BIT NAME
BIT LOCATION
(0 = LSB)
RECOMMENDED
DEFAULT
FUNCTION
MXSD 3 0
Used for factory trimming of the baseband filters.
1 = disables the quadrature mixers for filter tuning
0 = enables the quadrature mixers
D[2:0] 2, 1, 0 000
Control diagnostic features as follows:
000 = normal operation
001 = force charge-pump source current
010 = force charge-pump sink current
011 = force charge-pump high-impedance state
100 = power-detector RMS voltage at PWRDET
101 = N-divider output at TEST pin
110 = R-divider output at TEST pin
111 = local oscillator output at TEST pin
Table 3. PLL Register
BIT NAME
BIT LOCATION
(0 = LSB)
RECOMMENDED
DEFAULT
FUNCTION
CP[1:0] 7, 6 11
Set the charge-pump current.
00 = ±1.5mA
01 = ±2mA
10 = ±2.5mA
11 = ±3mA
CPS 5 1
Sets the charge-pump current selection mode between automatic and manual.
0 = charge-pump current is set manually through the CP[1:0] bits
1 = charge-pump current is automatically selected based on ADC read values
in both VAS and manual VCO selection modes
EPB 4 1
Controls the charge-pump prebias function.
0 = disables the charge-pump prebias function
1 = enables the charge-pump prebias function
RPD 3 0
Sets the prebias on-time control from reference divider.
0 = 280ns
1 = 650ns
NPD 2 0
Sets the prebias on-time control from VCO/LO divider.
0 = 500ns
1 = 1000ns
TON 1 0
Sets the charge-pump on-time control.
0 = 2.5ns
1 = 5ns
VAS 0 1
Controls the VCO autoselect (VAS) function.
0 = disables the VCO autoselect function and allows manual VCO selection
through the VCO[1:0] and VSB[2:0] bits
1 = enables the on-chip VCO autoselect state machine
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P25

MAX2160ETL+T

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Buy MAX2160ETL+T
Manufacturer:
Maxim Integrated
Description:
Tuners ISDB-T Single-Seg Low-IF Tuner
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