MAX2160/MAX2160EBG
ISDB-T Single-Segment Low-IF Tuners
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Table 4. VCO Register
BIT NAME
BIT LOCATION
(0 = LSB)
RECOMMENDED
DEFAULT
FUNCTION
VCO[1:0] 7, 6 11
Control which VCO is activated when using manual VCO programming mode.
This will also serve as the starting point for the VCO autoselect mode.
00 = select VCO 0
01 = select VCO 1
10 = select VCO 2
11 = select VCO 3
VSB[2:0] 5, 4, 3 011
Select a particular sub-band for each of the on-chip VCOs. Together with the
VCO[2:0] bits a manual selection of a VCO and a sub-band can be made. This
will also serve as the starting point for the VCO autoselect mode.
000 = select sub-band 0
001 = select sub-band 1
010 = select sub-band 2
011 = select sub-band 3
100 = select sub-band 4
101 = select sub-band 5
110 = select sub-band 6
111 = select sub-band 7
ADL 2 0
Enables or disables the VCO tuning voltage ADC latch when the VCO autoselect
mode (VAS) is disabled.
0 = disables the ADC latch
1 = latches the ADC value
ADE 1 0
Enables or disables VCO tuning voltage ADC read when the VCO autoselect
mode (VAS) is disabled.
0 = disables ADC read
1 = enables ADC read
LTC 0 0
Sets the source current for the VAS time constant.
0 = 1µA
1 = 2µA
MAX2160/MAX2160EBG
ISDB-T Single-Segment Low-IF Tuners
14 ______________________________________________________________________________________
Table 5. Control Register
BIT NAME
BIT LOCATION
(0 = LSB)
RECOMMENDED
DEFAULT
FUNCTION
MOD 7 0
Sets the modulation mode and the baseband gain step.
0 = selects QAM mode and disables the 7dB gain step
1 = selects QPSK mode and adds 7dB of gain in the baseband stages
BBL[1:0] 6, 5 10
Set the bias current for the baseband circuits to provide for fine linearity
adjustments.
00 = lower linearity
01 = nominal linearity
10 = medium linearity
11 = high linearity
HSLS 4 1
Selects between high-side and low-side LO injection.
0 = low-side injection
1 = high-side injection
PD[2:0] 3, 2, 1 011
Set the AGC attack point (at RFIN).
000 = -62dBm
001 = -60dBm
010 = -58dBm
011 = -56dBm
100 = -54dBm
101 = -52dBm
110 = -50dBm
111 = -48dBm
EPD 0 0
Enables or disables the power-detector circuit.
0 = disables the power-detector circuit for low-current mode
1 = enables the power-detector circuit
MAX2160/MAX2160EBG
ISDB-T Single-Segment Low-IF Tuners
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Table 6. XTAL Divide
BIT NAME
BIT LOCATION
(0 = LSB)
RECOMMENDED
DEFAULT
FUNCTION
XD[4:0] 7–3 00001
Set the crystal divider ratio for XTALOUT.
00000 = XTALOUT buffer disabled (off)
00001 = divide-by-1
00010 = divide-by-2
00011 = divide-by-3
00100 = divide-by-4
00101 through 11110 = all divide values from 3 (00101) to 30 (11110)
11111 = divide-by-31
PWDN 2 0
Software power-down control.
0 = normal operation
1 = shuts down the entire chip but leaves the 2-wire bus active and maintains
the current register states
STBY 1 0
Software standby control.
0 = normal operation
1 = disables the signal path and frequency synthesizer leaving only the 2-wire
bus, crystal oscillator, XTALOUT buffer, and XTALOUT buffer divider active
QOFF 0 0
Enables and disables the Q-channel output.
0 = Q channel enabled
1 = Q channel disabled
Table 7. R-Divider Register
BIT NAME
BIT LOCATION
(0 = LSB)
RECOMMENDED
DEFAULT
FUNCTION
R[7:0] 7–0 0x38
Set the PLL reference-divider (R) number. Default R-divider value is 56 decimal.
R can range from 22 to 182 decimal.
Table 8. N-Divider MSB Register
BIT
NAME
BIT LOCATION
(0 = LSB)
RECOMMENDED
DEFAULT
FUNCTION
N[12:5] 7–0 0x53
Set the most significant bits of the PLL integer-divider number (N). Default
integer-divider value is N = 2687 decimal. N can range from 829 to 5374.
Table 9. N-Divider LSB Register
BIT NAME
BIT LOCATION
(0 = LSB)
RECOMMENDED
DEFAULT
FUNCTION
N[4:0] 7–3 11111
Set the least significant bits of the PLL integer-divider number (N). Default
integer-divider value is N = 2687 decimal. N can range from 829 to 5374.
X 2, 1, 0 X Unused.

MAX2160ETL+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Tuners ISDB-T Single-Seg Low-IF Tuner
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