PTN3393 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 10 June 2014 11 of 30
NXP Semiconductors
PTN3393
2-lane DisplayPort to VGA adapter IC
7.3.2 I
2
C over AUX CH registers
7.3.2.1 I
2
C-bus speed control register (read only, 0000Ch)
Bit or bits are set to indicate I
2
C-bus speed control capabilities.
DisplayPort source reads register 0000Ch and sets the I
2
C-bus speed according to the
DPCD register 00109h setting. The PTN3393 then adapts its I
2
C-bus bit rate to the speed
set by the DisplayPort source.
7.3.2.2 I
2
C-bus speed control/status register (read/write, 00109h)
Bit values in this register are assigned to I
2
C-bus speeds.
Prior to software writing to this register, PTN3393 defaults to the I
2
C-bus speed (either
50 kbit/s or 10 kbit/s) selected by the S2 pin (Table 3
).
On read, the PTN3393 returns a value set to indicate the speed currently in use.
On write, software provides a mask to limit the speeds to be enabled:
• The PTN3393 uses the slowest speed enabled by the mask and the PTN3393 speed
capabilities.
• If the result of the mask with the speed capabilities is 0000 0000b, then the PTN3393
keeps the S2 setting I
2
C-bus speed that it is using before the software write (that is,
no change).
Some specific examples are listed below for clarification purposes:
• If the source writes 1111 1111b, the PTN3393 uses the lowest speed of 1 kbit/s.
• If the source writes 0000 1100b, the PTN3393 uses the lower of 10 kbit/s and
100 kbit/s, that is, 10 kbit/s.
• If the source writes 0011 0000b, the PTN3393 would stay using the same I
2
C-bus
speed that it is using before the software write (that is, no change).
For DDC communication, the PTN3393 generates defer responses to the source while the
I
2
C-bus transfer is taking place as specified in the DisplayPort standard v1.1a. Note that
when the I
2
C-bus bit rate is set to 1 kbit/s, each bit takes 1 ms. One byte including
I2C_ACK takes 9 ms. Given this, the DisplayPort source should expect over
20 I2C_DEFER’s when requesting to read a byte over I
2
C-bus at the slowest rate.
