PTN3393 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 10 June 2014 13 of 30
NXP Semiconductors
PTN3393
2-lane DisplayPort to VGA adapter IC
7.4.1 S0 = logic 0
If S0 is left open-circuit (internal pull-down) (DisplayPort v1.1a compliant behavior),
PTN3393 behaves as stated in VESA DisplayPort v1.1a, sections 7 and 8. PTN3393 will
keep HPD LOW during its internal initialization sequence after power-up. It then updates
DPCD register SINK_COUNT to the expected value, depending if a VGA monitor is
detected or not, and then asserts HPD HIGH whatever is the value of SINK_COUNT
register. Each time PTN3393 detects a change in the VGA monitor connection status, it
updates the SINK_COUNT register accordingly, sets
DOWNSTREAM_PORT_STATUS_CHANGED register bit to 1 and generates IRQ_HPD
pulse to signal the source about the status change. Refer to Figure 3
, S0 = LOW
flowchart.
7.4.2 S0 = logic 1
If S1 is tied to HIGH with external pull-up (best interoperability behavior), the PTN3393 will
keep HPD LOW during its internal initialization sequence after power-up. It then waits for
a VGA monitor to be connected downstream before asserting HPD HIGH to force source
waiting for a VGA monitor before starting protocol negotiations. If a VGA monitor is
disconnected during normal operations, PTN3393 asserts HPD LOW so that the source
considers that no sink device is connected anymore. Refer to Figure 3
, S0 = HIGH
flowchart.
7.5 EDID handling
Figure 4 shows a DisplayPort-to-analog video converter (or dongle) situated between the
DisplayPort source and a VGA monitor. The PTN3393 converts a DP I
2
C Over AUX
request to I
2
C on the monitor's DDC bus. The monitor's EDID read data is then returned to
the DP source via an I
2
C Over AUX response issued by the PTN3393.
It is the responsibility of the source to choose only video modes which are declared in the
EDID and to adjust the DisplayPort link capabilities (link rate and lane count) to provide
the necessary video bandwidth. The PTN3393 does not cache or modify the EDID to
match the capabilities of the DisplayPort link data.
If the DisplayPort source drives display modes that are not specified in the EDID mode
list, the PTN3393 does not detect such conditions, and displays at its output what it is
presented by the DisplayPort source.
Fig 4. DisplayPort to VGA adapter IC (dongle) sits between the DisplayPort source and a
VGA monitor with EDID
DP Tx
002aae039
box-to-box
DisplayPort
source device
DP Rx
with DPCD
VIDEO DAC
DisplayPort to VGA adapter IC
box-to-box
legacy
VGA DISPLAY
WITH EDID
sink device
