PTN3393 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 10 June 2014 16 of 30
NXP Semiconductors
PTN3393
2-lane DisplayPort to VGA adapter IC
9.1 Display resolution
Table 5 lists some example display resolutions and clock rates that PTN3393 supports.
(Refer to Footnote 1 on page 2
.)
[1] Contact NXP team for other monitor timings not listed in this table.
The available bandwidth over a 2-lane HBR DisplayPort v1.1a link limits pixel clock rate
support to:
240 MHz at 6 bpc
180 MHz at 8 bpc
Table 5. Display resolution and pixel clock rate
[1]
Display
type
Active video Total frame Bits
per
pixel
Vertical
frequency
(Hz)
Pixel
clock
(MHz)
Data
rate
(Gbit/s)
Standard type
Horizontal Vertical Horizontal
total (pixel)
Vertical
total (line)
VGA 640 480 800 525 24 59.94 25.175 0.76 Industry standard
SVGA 800 600 1056 628 24 60.317 40.000 1.20 VESA guidelines
XGA 1024 768 1344 806 24 60.004 65.000 1.95 VESA guidelines
XGA+ 1152 864 1600 900 24 75 108.000 3.24 VESA standard
HD 1360 768 1792 795 24 60.015 85.500 2.56 VESA standard
HD/WXGA 1366 768 1792 798 24 59.79 85.501 2.57 VESA standard
HD/WXGA 1280 720 1650 750 24 60 74.250 2.23 CEA standard
WXGA 1280 800 1680 831 24 59.81 83.500 2.50 CVT
WXGA 1280 800 1696 838 24 74.934 106.500 3.19 CVT
WXGA 1280 800 1712 843 24 84.88 122.500 3.68 CVT
SXGA 1280 960 1800 1000 24 60 108.000 3.24 VESA standard
SXGA 1280 1024 1688 1066 24 60.02 108.000 3.24 VESA standard
SXGA 1280 1024 1688 1066 24 75.025 135.001 4.05 VESA standard
SXGA 1280 1024 1728 1072 24 85.024 157.500 4.72 VESA standard
SXGA+ 1400 1050 1864 1089 24 59.978 121.749 3.65 CVT
WXGA+ 1440 900 1904 934 24 59.887 106.499 3.19 CVT
HD+ 1600 900 1800 1000 24 60 108.000 3.24 VESA standard
UXGA 1600 1200 2160 1250 24 60 162.000 4.86 VESA standard
UXGA 1600 1200 2160 1250 24 65 175.500 5.27 VESA standard
WSXGA+ 1680 1050 2240 1089 24 59.954 146.249 4.39 CVT
FHD 1920 1080 2200 1125 24 60 148.500 4.46 CEA standard
WUXGA 1920 1200 2592 1245 18 59.885 193.251 4.35 CVT
WUXGA 1920 1200 2080 1235 24 59.95 154.000 4.62 CVT RB
1920 1440 2600 1500 18 60 234.000 5.27 CVT RB
QWXGA 2048 1152 2250 1200 24 60 162.000 4.86 VESA standard
QXGA 2048 1536 2144 1555 24 49.266 164.249 4.93 CVT
PTN3393 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 10 June 2014 17 of 30
NXP Semiconductors
PTN3393
2-lane DisplayPort to VGA adapter IC
9.2 Power supply filter
All supply pins can be tied to a single 3.3 V power source. Sufficient decoupling
capacitance to ground should be connected from each V
DD
pin directly to ground to filter
supply noise. (Refer to Figure 5 “
Application diagram.)
9.3 DAC terminations
We recommend the DAC outputs to use 75 double termination. Figure 6 shows an
example of VGA dongle application. A 75 termination is used to terminate inside the
dongle, and another 75 termination is typically used inside the RGB monitor. The load
sensing mechanism assumes this double termination.
10. Limiting values
[1] Human Body Model: ANSI/ESDA/JEDEC JDS-001-2012 (Revision of ANSI/ESDA/JEDEC JS-001-2011), ESDA/JEDEC Joint standard
for ESD sensitivity testing, Human Body Model - Component level; Electrostatic Discharge Association, Rome, NY, USA; JEDEC Solid
State Technology Association, Arlington, VA, USA.
[2] Charged Device Model: JESD22-C101E December 2009 (Revision of JESD22-C101D, October 2008), standard for ESD sensitivity
testing, Charged Device Model - Component level; JEDEC Solid State Technology Association, Arlington, VA, USA.
Fig 6. Recommended DAC terminations for PTN3393
002aae044
DAC
RED, GRN, BLU
RED_N, GRN_N, BLU_N
DONGLE
PCB
EMI filter
75 Ω
75 Ω
VGA cable
double-ended
termination
MONITOR
75 Ω
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DDA
analog supply voltage 0.3 +3.8 V
V
DDD
digital supply voltage 0.3 +4.6 V
V
I
input voltage 3.3 V CMOS inputs 0.3 V
DD
+0.5 V
T
stg
storage temperature 65 +150 C
V
ESD
electrostatic discharge voltage HBM
[1]
- 7000 V
CDM
[2]
- 1000 V
PTN3393 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 10 June 2014 18 of 30
NXP Semiconductors
PTN3393
2-lane DisplayPort to VGA adapter IC
11. Recommended operating conditions
[1] Input signals to these pins must be AC-coupled.
12. Characteristics
12.1 Current consumption, power dissipation and thermal characteristics
Table 7. Operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
DDA
analog supply voltage 3.0 3.3 3.6 V
V
DDD
digital supply voltage 3.0 3.3 3.6 V
V
I
input voltage 3.3 V CMOS inputs 0 3.3 3.6 V
SDA and SCL inputs with respect
to ground
05 5.5V
V
I(AV)
average input voltage DC value at
ML_LANE0+, ML_LANE0,
ML_LANE1+, ML_LANE1,
AUX_CH+, AUX_CH inputs
[1]
-0 - V
R
ext(RSET)
external resistance on pin RSET between RSET (pin 22) and GND - 1.2 1% - k
T
amb
ambient temperature commercial grade 0 - 85 C
Table 8. Current consumption, power dissipation and thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
I
DD
supply current normal operation,
UXGA / 162 MHz pixel clock
-180-mA
I
DD(stb)
standby supply current Standby mode - 12 - mA
P power dissipation normal operation,
UXGA / 162 MHz pixel clock
-600-mW
R
th(j-a)
thermal resistance from junction
to ambient
in free air for SOT619-1 - 35 - K/W
R
PU
pull-up resistance RESET_N pin; 0 V V
I
V
DD
44 66 95 k
R
pd
pull-down resistance S0 to S3 pins; 0 V V
I
V
DD
44 66 95 k

PTN3393BSY

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - Specialized 2lane DisplayPort to VGA adapter testIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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