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LTC4269CDKD-1#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P44
LTC4269-1
13
42691fc
APPLICATIONS INFORMATION
Table 1. LTC4269-1 Modes of Operation as a Function
of Input Voltage
V
PORTP
–V
PORTN
(V) LTC4269-1 MODES OF OPERATION
0V to 1.4V Inactive (Reset After 1st Classifi cation Event)
1.5V to 9.8V
(5.4V to 9.8V)
25k Signature Resistor Detection Before 1st
Classifi cation Event (Mark, 11k Signature
Corrupt After 1st Classifi cation Event)
12.5V to ON/OFF* Classifi cation Load Current Active
ON/OFF* to 60V Inrush and Power Applied To PD Load
>71V Overvoltage Lockout,
Classifi cation and Hot Swap Are Disabled
*ON/OFF includes hysteresis. Rising input threshold, 37.2V Max.
Falling input threshold, 30V Min.
These modes satisfy the requirements defi ned in the
IEEE 802.3af/IEEE 802.3at specifi cation.
INPUT DIODE BRIDGE
In the IEEE 802.3af/IEEE 802.3at standard, the modes of
operation reference the input voltage at the PD’s RJ45
connector. Since the PD must handle power received in
either polarity from either the data or the spare pair, input
diode bridges BR1 and BR2 are connected between the
RJ45 connector and the LTC4269-1 (Figure 2).
The input diode bridge introduces a voltage drop that
affects the range for each mode of operation. The
LTC4269-1 compensates for these voltage drops so that a
PD built with the LTC4269-1 meets the IEEE 802.3af/IEEE
802.3at-established voltage ranges. Note the Electrical
Characteristics are referenced with respect to the
LTC4269- 1 package pins.
DETECTION
During detection, the PSE looks for a 25k signature resis-
tor which identifi es the device as a PD. The PSE will apply
two voltages in the range of 2.8V to 10V and measures
the corresponding currents. Figure 1 shows the detection
voltages V1 and V2 and the corresponding PD current.
The PSE calculates the signature resistance using the ΔV/
ΔI measurement technique.
The LTC4269-1 presents its precision, temperature-com-
pensated 25k resistor between the V
PORTP
and V
PORTN
pins, alerting the PSE that a PD is present and requests
power to be applied. The LTC4269-1 signature resistor
also compensates for the additional series resistance
introduced by the input diode bridge. Thus a PD built
with the LTC4269-1 conforms to the IEEE 802.3af/IEEE
802.3at specifi cations.
RX
–
6
RX
+
3
TX
–
2
TX
+
RJ45
T1
POWERED
DEVICE
(PD)
INPUT
42691 F02
1
7
8
5
4
SPARE
–
SPARE
+
TO PHY
BR2
0.1µF
100V
BR1
D3
LTC4269-1
V
PORTN
V
PORTP
Figure 2. PD Front End Using Diode Bridges on Main and Spare Inputs
LTC4269-1
14
42691fc
APPLICATIONS INFORMATION
SIGNATURE CORRUPT OPTION
In some designs that include an auxiliary power option,
it is necessary to prevent a PD from being detected by a
PSE. The LTC4269-1 signature resistance can be corrupted
with the SHDN pin (Figure 3). Taking the SHDN pin high
will reduce the signature resistor below 11k which is an
invalid signature per the IEEE 802.3af/IEEE 802.3at speci-
fi cation, and alerts the PSE not to apply power. Invoking
the SHDN pin also ceases operation for classifi cation and
disconnects the LTC4269-1 load from the PD input. If this
feature is not used, connect SHDN to V
PORTN
.
Table 2. Summary of Power Classifi cations and LTC4269-1
R
CLASS
Resistor Selection
CLASS USAGE MAXIMUM AVERAGE
POWER LEVELS AT
INPUT OF PD
(W)
NOMINAL
CLASSIFICATION
LOAD CURRENT
(mA)
LTC4269-1
R
CLASS
RESISTOR
(Ω, 1%)
0 Type 1 0.44 to 13.0 < 0.4 Open
1 Type 1 0.44 to 3.84 10.5 124
2 Type 1 3.84 to 6.49 18.5 69.8
3 Type 1 6.49 to 13.0 28 45.3
4 Type 2 13.0 to 25.5 40 30.9
2-EVENT CLASSIFICATION AND THE T2P PIN
A Type 2 PSE may declare the availability of high power
by performing a 2-event classifi cation (layer 1) or by
communicating over the high speed data line (layer 2). A
Type 2 PD must recognize both layers of communication.
Since layer 2 communication takes place directly between
the PSE and the LTC4269-1 load, the LTC4269-1 concerns
itself only with recognizing 2-event classifi cation.
In 2-event classifi cation, a Type 2 PSE probes for power
classifi cation twice. Figure 4 presents an example of a
2-event classifi cation. The 1st classifi cation event occurs
when the PSE presents an input voltage between 15.5V
to 20.5V and the LTC4269-1 presents a class 4 load cur-
rent. The PSE then drops the input voltage into the mark
voltage range of 7V to 10V, signaling the 1st mark event.
The PD in the mark voltage range presents a load current
between 0.25mA to 4mA.
The PSE repeats this sequence, signaling the 2nd Clas-
sifi cation and 2nd mark event occurrence. This alerts the
LTC4269-1 that a Type 2 PSE is present. The Type 2 PSE
then applies power to the PD and the LTC4269-1 charges
up the reservoir capacitor C1 with a controlled inrush cur-
rent. When C1 is fully charged, and the LTC4269-1 declares
power good, the T2P pin presents an active low signal, or
low impedance output with respect to V
PORTN
. The T2P
output becomes inactive when the LTC4269-1 input voltage
falls below undervoltage lockout threshold.
Figure 3. 25k Signature Resistor with Disable
V
PORTP
V
PORTN
SHDN
LTC4269-1
SIGNATURE DISABLE
42691 F03
25k SIGNATURE
RESISTOR
16k
TO
PSE
CLASSIFICATION
Classifi cation provides a method for more effi cient power
allocation by allowing the PSE to identify a PD power clas-
sifi cation. Class 0 is included in the IEEE specifi cation for
PDs that do not support classifi cation. Class 1-3 partitions
PDs into three distinct power ranges. Class 4 includes the
new power range under IEEE802.3at (see Table 2).
During classifi cation probing, the PSE presents a fi xed
voltage between 15.5V and 20.5V to the PD (Figure 1).
The LTC4269-1 asserts a load current representing the
PD power classifi cation. The classifi cation load current
is programmed with a resistor R
CLASS
that is chosen
from Table 2.
LTC4269-1
15
42691fc
APPLICATIONS INFORMATION
DETECTION V1
ON
OFF
OFF OFFON
T = R
LOAD
C1
TRACKS
V
PORTN
DETECTION V2
TIME
PD CURRENT
50
40
30
V
PORTP
(V)
20
10
40mA
50
40
30
20
10
TIME
V
PORTP
– V
NEG
(V)
–10
TIME
–20
–30
V
PORTP
– T2P (V)
–40
–50
dV
dt
INRUSH
C1
=
42691 F04
INRUSH = 100mA R
CLASS
= 30.9Ω
I
LOAD
=
V
PORTN
R
LOAD
V
PORTP
PSE
I
IN
R
LOAD
R
CLASS
C1
R
CLASS
T2P
LTC4269-1
V
NEG
V
PORTN
1st CLASS
1st MARK 2nd MARK
DETECTION V1
DETECTION V2
1st MARK 2nd MARK
2nd CLASS
1st CLASS
2nd CLASS
LOAD, I
LOAD
INRUSH
Figure 4. V
NEG
, T2P and PD Current
as a Result of 2-Event Classifi cation
SIGNATURE CORRUPT DURING MARK
As a member of the IEEE 802.3at working group, Linear
Technology noted that it is possible for a Type 2 PD to
receive a false indication of a 2-event classifi cation if a PSE
port is pre-charged to a voltage above the detection voltage
range before the fi rst detection cycle. The IEEE working
group modifi ed the standard to prevent this possibility by
requiring a Type 2 PD to corrupt the signature resistance
during the mark event, alerting the PSE not to apply power.
The LTC4269-1 conforms to this standard by corrupting
the signature resistance. This also discharges the port
before the PSE begins the next detection cycle.
PD STABILITY DURING CLASSIFICATION
Classifi cation presents a challenging stability problem due
to the wide range of possible classifi cation load current.
The onset of the classifi cation load current introduces a
voltage drop across the cable and increases the forward
voltage of the input diode bridge. This may cause the PD
to oscillate between detection and classifi cation with the
onset and removal of the classifi cation load current.
The LTC4269-1 prevents this oscillation by introducing a
voltage hysteresis window between the detection and clas-
sifi cation ranges. The hysteresis window accommodates
the voltage changes a PD encounters at the onset of the
classifi cation load current, thus providing a trouble-free
transition between detection and classifi cation modes.
The LTC4269-1 also maintains a positive I-V slope through-
out the classifi cation range up to the on-voltage. In the
event a PSE overshoots beyond the classifi cation voltage
range, the available load current aids in returning the PD
back into the classifi cation voltage range. (The PD input
may otherwise be “trapped” by a reverse-biased diode
bridge and the voltage held by the 0.1F capacitor).
INRUSH CURRENT
Once the PSE detects and optionally classifi es the PD,
the PSE then applies powers on the PD. When the
LTC4269-1 input voltage rises above the on-voltage
threshold, LTC4269-1 connects V
NEG
to V
PORTN
through
the internal power MOSFET.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P44

LTC4269CDKD-1#PBF

Mfr. #:
Buy LTC4269CDKD-1#PBF
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN IEEE 802.3at High Power PD Controller with Flyback Switcher
Lifecycle:
New from this manufacturer.
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