CYRF89135
Document Number: 001-86331 Rev. ** Page 19 of 41
ADC Electrical Specifications
Table 10. ADC User Module Electrical Specifications
Symbol Description Conditions Min Typ Max Units
Input
V
IN
Input voltage range 0 – VREFADC V
C
IIN
Input capacitance ––5pF
R
IN
Input resistance Equivalent switched cap input
resistance for 8-, 9-, or 10-bit
resolution
1/(500fF ×
data clock)
1/(400fF ×
data clock)
1/(300fF ×
data clock)
Reference
V
REFADC
ADC reference voltage –1.141.26V
Conversion Rate
F
CLK
Data clock Source is chip’s internal main
oscillator. See AC Chip-Level
Specifications for accuracy
2.25 6 MHz
S8 8-bit sample rate Data clock set to 6 MHz. sample
rate = 0.001/ (2^Resolution/Data
Clock)
23.43 ksps
S10 10-bit sample rate Data clock set to 6 MHz. sample
rate = 0.001/ (2^resolution/data
clock)
5.85 ksps
DC Accuracy
RES Resolution Can be set to 8-, 9-, or 10-bit 8 10 bits
DNL Differential nonlinearity
–1 – +2 LSB
INL Integral nonlinearity
–2 – +2 LSB
E
OFFSET
Offset error 8-bit resolution 0 3.20 19.20 LSB
10-bit resolution 0 12.80 76.80 LSB
E
GAIN
Gain error For any resolution –5 +5 %FSR
Power
I
ADC
Operating current 2.10 2.60 mA
PSRR Power supply rejection ratio PSRR (VIN
> 3.0 V) –24–dB
PSRR (VIN
< 3.0 V) –30–dB
CYRF89135
Document Number: 001-86331 Rev. ** Page 20 of 41
DC POR and LVD Specifications
The following table lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.
Table 11. DC POR and LVD Specifications
Symbol Description Conditions Min Typ Max Units
V
POR1
2.36 V selected in PSoC Designer
PORLEV[1:0] = 00b, HPOR = 1
V
IN
must be greater than or equal
to 1.9 V during startup, reset from
the XRES pin, or reset from
watchdog.
–2.362.41V
V
POR2
2.60 V selected in PSoC Designer
PORLEV[1:0] = 01b, HPOR = 1
–2.602.66
V
POR3
2.82 V selected in PSoC Designer
PORLEV[1:0] = 10b, HPOR = 1
–2.822.95
V
LVD0
2.45 V selected in PSoC Designer 2.40 2.45 2.51 V
V
LVD1
2.71 V selected in PSoC Designer 2.64
[8]
2.71 2.78
V
LVD2
2.92 V selected in PSoC Designer 2.85
[9]
2.92 2.99
V
LVD3
3.02 V selected in PSoC Designer 2.95
[10]
3.02 3.09
V
LVD4
3.13 V selected in PSoC Designer 3.06 3.13 3.20
V
LVD5
1.90 V selected in PSoC Designer 1.84 1.90 2.32
Notes
8. Always greater than 50 mV above V
PPOR1
voltage for falling supply.
9. Always greater than 50 mV above V
PPOR2
voltage for falling supply.
10. Always greater than 50 mV above V
PPOR3
voltage for falling supply.
CYRF89135
Document Number: 001-86331 Rev. ** Page 21 of 41
DC Programming Specifications
The following table lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.
Table 12. DC Programming Specifications
Symbol Description Conditions Min Typ Max Units
VIN Supply voltage for flash write
operations
1.91 3.6 V
I
DDP
Supply current during
programming or verify
5 25 mA
V
ILP
Input low voltage during
programming or verify
See the appropriate DC GPIO
Specifications on page 16
V
IL
V
V
IHP
Input high voltage during
programming or verify
See the appropriate DC GPIO
Specifications on page 16
V
IH
V
I
ILP
Input current when Applying V
ILP
to P1[0] or P1[1] during
programming or verify
Driving internal pull-down resistor 0.2 mA
I
IHP
Input current when applying V
IHP
to P1[0] or P1[1] during
programming or verify
Driving internal pull-down resistor 1.5 mA
V
OLP
Output low voltage during
programming or verify
+ 0.75 V
V
OHP
Output high voltage during
programming or verify
See appropriate DC GPIO
Specifications on page 16. For
V
IN
> 3 V use V
OH4
in Table 3 on
page 13.
V
OH
VIN V
Flash
ENPB
Flash write endurance Erase/write cycles per block 50,000
Flash
DR
Flash data retention Following maximum Flash write
cycles; ambient temperature of
55 °C
20 Years

CYRF89135-68LTXC

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
RF Transceiver Wireless Capacitive Touch
Lifecycle:
New from this manufacturer.
Delivery:
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