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MCP9902T-AE/RW

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P50
2015-2016 Microchip Technology Inc. DS20005382C-page 31
MCP9902/3/4
REGISTER 5-20: DIODE FAULT MASK – DIODE FAULT MASK REGISTER (ADDRESS 1FH)
U-0 U-0 U-0 U-0 RW-0 RW-0 RW-0 RW-0
— — — — E3MSK E2MSK E1MSK INTMSK
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR ‘1’ = bit is set ‘0’ = Bit is cleared x = Bit in unknown
7-4 Unimplemented: Read as ‘0’
3 E3MASK: Masks the ALERT
/THERM2 pin from asserting when the External Diode 3 channel is out of
limit or reports a diode fault.
1 = The External Diode 3 channel will not cause the ALERT
/THERM2 pin to be asserted if it is out of
limit or reports a diode fault.
0 = The External Diode 3 channel will cause the ALERT/THERM2 pin to be asserted if it is out of limit
or reports a diode fault.
2 E2MASK: Masks the ALERT
/THERM2 pin from asserting when the External Diode 2 channel is out of
limit or reports a diode fault.
1 = The External Diode 2 channel will not cause the ALERT
/THERM2 pin to be asserted if it is out of
limit or reports a diode fault.
0 = The External Diode 2 channel will cause the ALERT/THERM2 pin to be asserted if it is out of limit
or reports a diode fault.
1 E1MASK: Masks the ALERT
/THERM2 pin from asserting when the External Diode 1 channel is out of
limit or reports a diode fault.
1 = The External Diode 1 channel will not cause the ALERT
/THERM2 pin to be asserted if it is out of
limit or reports a diode fault.
0 = The External Diode 1 channel will cause the ALERT/THERM2 pin to be asserted if it is out of limit
or reports a diode fault.
0 INTMASK: Masks the ALERT
/THERM2 pin from asserting when the Internal Diode temperature is out
of limit.
1 = The Internal Diode channel will not cause the ALERT
/THERM2 pin to be asserted if it is out of
limit.
0 = The Internal Diode channel will cause the ALERT/THERM2 pin to be asserted if it is out of limit.
MCP9902/3/4
DS20005382C-page 32 2015-2016 Microchip Technology Inc.
REGISTER 5-21: CONSEC ALERT – CONSECUTIVE ALERT REGISTER (ADDRESS 22H)
RW-0 RW-1 RW-1 RW-1 RW-0 RW-0 RW-0 U-0
TMOUT CTHM<2:0> CALRT<2:0>
—
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR ‘1’ = bit is set ‘0’ = Bit is cleared x = Bit in unknown
7 TMOUT: Enables the time-out and idle functionality of the I
2
C protocol
1 = The I
2
C time-out and idle functionality are enabled. The I
2
C interface will time-out if the clock line
is held low for longer than 30 ms. Likewise, it will reset if both the data and clock lines are held high for
longer than 200 µs.
0 = The I
2
C time-out and idle functionality are disabled. The I
2
C interface will not time-out if the clock
line is held low for longer than 30ms. Likewise, it will not reset if both the data and clock lines are held
high for longer than 200 µs. This is used for I
2
C compliance.
6-4 CTHM<2:0>: Determines the number of consecutive measurements that must exceed the
corresponding Therm Limit before the THERM
pin is asserted
000 = 1
001 = 2
011 = 3
111 = 4
3-1 CALRT<2:0>: Determines the number of consecutive measurements that must exceed the
corresponding Therm Limit before the ALERT
/THERM2 pin is asserted
000 = 1
001 = 2
011 = 3
111 = 4
0 Unimplemented: Read as ‘0’
2015-2016 Microchip Technology Inc. DS20005382C-page 33
MCP9902/3/4
REGISTER 5-22: EXT(N) BETA CFG – BETA COMPENSATION CONFIGURATION REGISTER
(ADDRESSES 25H AND 26H)
U-0 U-0 U-0 U-0 RW-1 RW-0 RW-0 RW-0
— — — — ENBLx BETAx<2:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR ‘1’ = bit is set ‘0’ = Bit is cleared x = Bit in unknown
7 Unimplemented: Read as ‘0’
6 Unimplemented: Read as ‘0’
5 Unimplemented: Read as ‘0’
4 Unimplemented: Read as ‘0’
3 ENBLx: Enables the Beta Compensation factor auto-detection function. X = 1 or 2, depending on the
device
1 = Auto-Beta detection for External Diode x is enabled
0 = Auto-Beta detection for External Diode x is disabled
2-0 BETAx<2:0>: These bits always reflect the current beta configuration settings. If auto-detection
circuitry is enabled, these bits will be updated automatically and writing to these bits will have no
effect.
000 = 0.11
001 = 0.18
010 = 0.25
011 = 0.33
100 = 0.43
101 = 1.00
110 = 2.33
111 = disabled
REGISTER 5-23: EXT (N) IDEALITY FACTOR – EXTERNAL DIODE N IDEALITY FACTOR
REGISTER (ADDRESSES 27H, 28H AND 31H)
U-0 U-0 RW-0 RW-1 RW-0 RW-0 RW-1 RW-0
— — IDEAL(n)<5:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR ‘1’ = bit is set ‘0’ = Bit is cleared x = Bit in unknown
7-6 Unimplemented: Read as ‘0’
5-0 IDEAL(n)<5:0>: External Diode n Ideality factor, where n = 1 to 3 depending on device
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P50

MCP9902T-AE/RW

Mfr. #:
Buy MCP9902T-AE/RW
Manufacturer:
Description:
SENSOR DIGITAL -40C-125C 8WDFN
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New from this manufacturer.
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