MCP9902/3/4
DS20005382C-page 36 2015-2016 Microchip Technology Inc.
The Therm Limit Status Register contains the status
bits that are set when a temperature channel Therm
Limit is exceeded. If any of these bits are set, the
THERM status bit in the Status register is set. Reading
from the Therm Limit Status register will not clear the
status bits. Once the temperature drops below the
Therm Limit minus the Therm Hysteresis, the corre-
sponding status bits will be automatically cleared. The
THERM bit in the Status register will be cleared when
all individual channel THERM bits are cleared.
REGISTER 5-26: THRM LIM STS – HIGH LIMIT STATUS REGISTER (ADDRESS 37H)
U-0 U-0 U-0 U-0 RC-0 RC-0 RC-0 RC-0
— — — — E3THERM E2THERM E1THERM ITHERM
bit 7 bit 0
Legend:
RC = Read-then-clear bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR ‘1’ = bit is set ‘0’ = Bit is cleared x = Bit in unknown
7-4 Unimplemented: Read as ‘0’
3 E3THERM: This bit is set when the External Diode 3 channel exceeds its programmed Therm Limit.
When set, this bit will assert the THERM
pin.
1 = THERM
pin asserted
0 = THERM
pin not asserted
2 E2THERM: This bit is set when the External Diode 2 channel exceeds its programmed Therm Limit.
When set, this bit will assert the THERM
pin.
1 = THERM
pin asserted
0 = THERM
pin not asserted
1 E1THERM: This bit is set when the External Diode 1 channel exceeds its programmed Therm Limit.
When set, this bit will assert the THERM
pin.
1 = THERM
pin asserted
0 = THERM
pin not asserted
0 ITHERM: This bit is set when the Internal Diode channel exceeds its programmed Therm Limit. When
set, this bit will assert the THERM
pin.
1 = THERM
pin asserted
0 = THERM
pin not asserted
REGISTER 5-27: FLTR SEL: FILTER SELECTION REGISTER (ADDRESS 40H)
U-0 U-0 U-0 U-0 U-0 U-0 RC-0 RC-0
— — — — — —FLTER<1:0>
bit 7 bit 0
Legend:
RC = Read-then-clear bit W = Writable bit U = Unimplemented bit, read as 0
-n = Value at POR ‘1’ = bit is set ‘0’ = Bit is cleared x = Bit in unknown
7-2 Unimplemented: Read as ‘0’
1-0 FILTER: Control the level of digital filtering that is applied to the External Diode temperature measure-
ment as shown in Table 4-6
