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M24C02-RDS6G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P40
DC and AC parameters M24C16, M24C08, M24C04, M24C02, M24C01
22/40 Doc ID 5067 Rev 13
V
IL
Input low voltage (SDA,
SCL, WC)
2.5 V ≤ V
CC
–0.45 0.3 V
CC
V
1.8 V ≤ V
CC
< 2.5 V –0.45 0.25 V
CC
V
V
IH
Input high voltage (SDA,
SCL, WC)
0.7V
CC
V
CC
+1 V
V
OL
Output low voltage I
OL
= 0.7 mA, V
CC
= 1.8 V 0.2 V
1. The device is not selected after a power-up, after a read command (after the Stop condition), or after the
completion of the internal write cycle t
W
(t
W
is triggered by the correct decoding of a write command).
Table 11. DC characteristics (M24Cxx-R)
Symbol Parameter
Test condition
(in addition to those in Table 7)
Min. Max. Unit
M24C16, M24C08, M24C04, M24C02, M24C01 DC and AC parameters
Doc ID 5067 Rev 13 23/40
Figure 11. AC measurement I/O waveform
Table 12. DC characteristics (M24Cxx-F)
Symbol Parameter
Test condition
(in addition to those in Table 8)
Min. Max. Unit
I
LI
Input leakage current (SCL, SDA,
E0, E1,and E2)
V
IN
= V
SS
or
V
CC
, device in Standby
mode
± 2 µA
I
LO
Output leakage current V
OUT
= V
SS
or
V
CC,
SDA in Hi-Z ± 2 µA
I
CC
Supply current
V
CC
= 1.7 V, f
c
= 400 kHz
(rise/fall time < 50 ns)
0.8 mA
I
CC1
Standby supply current
Device not selected
(1)
, V
IN
= V
SS
or
V
CC
, V
CC
= 1.7 V
1 µA
V
IL
Input low voltage (SDA, SCL, WC)
2.5 V ≤ V
CC
–0.45 0.3 V
CC
V
1.7 V ≤ V
CC
< 2.5 V –0.45 0.25 V
CC
V
V
IH
Input high voltage (SDA, SCL, WC) 0.7V
CC
V
CC
+1 V
V
OL
Output low voltage I
OL
= 0.7 mA, V
CC
= 1.7 V 0.2 V
1. The device is not selected after a power-up, after a read command (after the Stop condition), or after the completion of the
internal write cycle t
W
(t
W
is triggered by the correct decoding of a write command).
Table 13. AC measurement conditions
Symbol Parameter Min. Max. Unit
C
L
Load capacitance 100 pF
Input rise and fall times 50 ns
Input levels 0.2V
CC
to 0.8V
CC
V
Input and output timing reference levels 0.3V
CC
to 0.7V
CC
V
AI00825B
0.8V
CC
0.2V
CC
0.7V
CC
0.3V
CC
Input and Output
Timing Reference Levels
Input Levels
Table 14. Input parameters
Symbol Parameter
(1)
Test condition Min. Max. Unit
C
IN
Input capacitance (SDA) 8 pF
C
IN
Input capacitance (other pins) 6 pF
Z
WCL
WC input impedance V
IN
< 0.3 V 15 70 kΩ
Z
WCH
WC input impedance V
IN
> 0.7V
CC
500 kΩ
t
NS
Pulse width ignored (input filter on
SCL and SDA)
Single glitch 100 ns
1. Characterized only.
DC and AC parameters M24C16, M24C08, M24C04, M24C02, M24C01
24/40 Doc ID 5067 Rev 13
Table 15. AC characteristics at 400 kHz (I
2
C Fast-mode) (M24Cxx-W, M24Cxx-R,
M24Cxx-F)
Test conditions specified in either Table 6, Table 7 or Table 8 and Table 13
Symbol Alt. Parameter Min. Max. Unit
f
C
f
SCL
Clock frequency - 400 kHz
t
CHCL
t
HIGH
Clock pulse width high 600 - ns
t
CLCH
t
LOW
Clock pulse width low 1300 - ns
t
XH1XH2
(1)
1. Values recommended by the I
2
C bus Fast-mode specification for a robust design of the I
2
C bus
application. Note that the M24xxx devices decode correctly input rise or fall times from 1 ns up to 1 ms.
t
R
Input signal rise time 20 300 ns
t
XL1XL2
(1)
t
F
Input signal fall time 20 300 ns
t
DL1DL2
(2)
2. Characterized only.
t
F
SDA fall time 20 300 ns
t
DXCX
t
SU:DAT
Data in setup time 100 - ns
t
CLDX
t
HD:DAT
Data in hold time 0 - ns
t
CLQX
t
DH
Data out hold time 200 - ns
t
CLQV
(3)
3. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or
rising edge of SDA.
t
AA
Clock low to next data valid (access time) 200 900 ns
t
CHDX
(4)
4. For a reStart condition, or following a Write cycle.
t
SU:STA
Start condition setup time 600 - ns
t
DLCL
t
HD:STA
Start condition hold time 600 - ns
t
CHDH
t
SU:STO
Stop condition setup time 600 - ns
t
DHDL
t
BUF
Time between Stop condition and next Start
condition
1300 - ns
t
W
t
WR
Write time - 5 ms
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M24C02-RDS6G

Mfr. #:
Buy M24C02-RDS6G
Manufacturer:
STMicroelectronics
Description:
EEPROM 1.8-5.5V 2K (256x8)
Lifecycle:
New from this manufacturer.
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